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LM3S8730-IQN25-A2 데이터시트(PDF) 37 Page - List of Unclassifed Manufacturers

부품명 LM3S8730-IQN25-A2
상세설명  Microcontroller
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Writing to the Current Value register clears the register and the COUNTFLAG status bit. The write
does not trigger the SysTick exception logic. On a read, the current value is the value of the register
at the time the register is accessed.
If the core is in debug state (halted), the counter will not decrement. The timer is clocked with respect
to a reference clock. The reference clock can be the core clock or an external clock source.
SysTick Control and Status Register
Use the SysTick Control and Status Register to enable the SysTick features. The reset is
0x0000.0000.
Description
Reset
Type
Name
Bit/Field
Software should not rely on the value of a reserved bit. To provide compatibility with
future products, the value of a reserved bit should be preserved across a
read-modify-write operation.
0
RO
reserved
31:17
Returns 1 if timer counted to 0 since last time this was read. Clears on read by
application. If read by the debugger using the DAP, this bit is cleared on read-only
if the MasterType bit in the AHB-AP Control Register is set to 0. Otherwise, the
COUNTFLAG bit is not changed by the debugger read.
0
R/W
COUNTFLAG
16
Software should not rely on the value of a reserved bit. To provide compatibility with
future products, the value of a reserved bit should be preserved across a
read-modify-write operation.
0
RO
reserved
15:3
0 = external reference clock. (Not implemented for Stellaris microcontrollers.)
1 = core clock.
If no reference clock is provided, it is held at 1 and so gives the same time as the
core clock. The core clock must be at least 2.5 times faster than the reference clock.
If it is not, the count values are unpredictable.
0
R/W
CLKSOURCE
2
1 = counting down to 0 pends the SysTick handler.
0 = counting down to 0 does not pend the SysTick handler. Software can use the
COUNTFLAG to determine if ever counted to 0.
0
R/W
TICKINT
1
1 = counter operates in a multi-shot way. That is, counter loads with the Reload
value and then begins counting down. On reaching 0, it sets the COUNTFLAG to
1 and optionally pends the SysTick handler, based on TICKINT. It then loads the
Reload value again, and begins counting.
0 = counter disabled.
0
R/W
ENABLE
0
SysTick Reload Value Register
Use the SysTick Reload Value Register to specify the start value to load into the current value
register when the counter reaches 0. It can be any value between 1 and 0x00FF.FFFF. A start value
of 0 is possible, but has no effect because the SysTick interrupt and COUNTFLAG are activated
when counting from 1 to 0.
Therefore, as a multi-shot timer, repeated over and over, it fires every N+1 clock pulse, where N is
any value from 1 to 0x00FF.FFFF. So, if the tick interrupt is required every 100 clock pulses, 99
must be written into the RELOAD. If a new value is written on each tick interrupt, so treated as single
shot, then the actual count down must be written. For example, if a tick is next required after 400
clock pulses, 400 must be written into the RELOAD.
Description
Reset
Type
Name
Bit/Field
Software should not rely on the value of a reserved bit. To provide compatibility with
future products, the value of a reserved bit should be preserved across a read-modify-write
operation.
0
RO
reserved
31:24
37
September 02, 2007
Preliminary
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