전자부품 데이터시트 검색엔진 |
|
ST25W02B5TR 데이터시트(PDF) 11 Page - STMicroelectronics |
|
ST25W02B5TR 데이터시트(HTML) 11 Page - STMicroelectronics |
11 / 16 page BYTE WRITE DEV SEL BYTE ADDR DATA IN WC PAGE WRITE DEV SEL BYTE ADDR DATA IN 1 WC DATA IN 2 AI01101B PAGE WRITE (cont'd) WC (cont'd) DATA IN N ACK ACK ACK R/W ACK ACK ACK R/W ACK ACK Figure 9. Write Modes Sequence with Write Control = 1 (ST24/25W02) Sequential Read. This mode can be initiated with either a Current Address Read or a Random Ad- dress Read. However, in this case the master DOES acknowledge the data byte output and the memory continues to output the next byte in se- quence. To terminate the stream of bytes, the master must NOT acknowledge the last byte out- put, but MUST generate a STOP condition. The output data is from consecutive byte addresses, with the internal byte address counter automat- ically incremented after each byte output. After a count of the last memory address, the address counter will ’roll- over’ and the memory will continue to output data. Acknowledge in Read Mode. In all read modes the ST24/25x02 wait for an acknowledge during the 9th bit time. If the master does not pull the SDA line low during this time, the ST24/25x02 terminate the data transfer and switches to a standby state. 11/16 ST24/25C02, ST24C02R, ST24/25W02 |
유사한 부품 번호 - ST25W02B5TR |
|
유사한 설명 - ST25W02B5TR |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |