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FAN5631MPX 데이터시트(PDF) 8 Page - Fairchild Semiconductor

부품명 FAN5631MPX
상세설명  Regulated Step-Down Charge Pump DC/DC Converter
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제조업체  FAIRCHILD [Fairchild Semiconductor]
홈페이지  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN5631MPX 데이터시트(HTML) 8 Page - Fairchild Semiconductor

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© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN5631/FAN5632 Rev. 1.0.2
8
Block Diagram
UVLO
+
-
SHUTDOWN
CONTROL
LOGIC
CONFIGURATION
PULSE_SKIP
SHORT_CKT.
+
-
+
-
+
-
THERMAL
SHUTDOWN
IN
OUT
Vref RAMP
FB
FB
OUTPUT
150mV
1V
0.5* INPUT
VOLTAGE
REF.
SOFT START
Vref RAMP
OSCILLATOR
(2MHz)
C+
C-
ENABLE
V IN
GND.
D
R
I
V
E
R
S
0.25SW1
0.25SW1
0.25SW4
0.25SW4 0.5SW4
0.25SW3
0.25SW3 0.5SW3
0.5SW2
0.25SW2
0.25SW2
0.5SW1
FB
VOUT
Figure 14.
Block Diagram
Detailed Description
The FAN5631 / FAN5632 switched capacitor DC/DC
converter automatically configures switches to achieve
high efficiency and provides a regulated output voltage
by
means
of
pulse
skipping,
pulse
frequency
modulation (PFM). An internal soft-start circuit prevents
excessive inrush current from the supply. Each switch is
split into three segments. Based on the values of VIN,
VOUT, and IOUT; an internal circuit determines the
number of segments used to reduce current spikes.
Step-Down Charge Pump Operation
When VIN ≥ 2 × VOUT/9, the 2:1 configuration shown in
Figure 15 is enabled. The factor 0.9 is used instead of 1
to account for the effect of resistive losses across the
switches and to accommodate hysteresis in the voltage
detector comparator. Two-phase, non-overlapping clock
signals are generated to drive four switches. When
switches 1 and 3 are on, switches 2 and 4 are off and
CB is charged. When switches 2 and 4 are on, 1 and 3
are off and charge is transferred from CB to COUT.
When VIN ≥ 2 × VOUT/9, the 1:1 configuration shown in
Figure 16 is enabled. In the 1:1 configuration, switch 3
is always off and the switch 4 is always on. At 1.6V
output setting, the configuration changes from 2:1 to 1:1
at VIN=3.56V. At 1.3V output setting, the change occurs
at VIN=3.06V.
Pulse-skipping PFM and Fractional Switch
Operation
When the regulated output voltage reaches its upper
limit, the switches are turned off and the output voltage
reaches its lower limit. In a step-down 2:1 mode of
operation, with 1.6V output as an example; when the
output reaches about 1.62V (upper limit), the control
logic turns off all switches: switching stops completely.
This is pulse-skipping mode. Since the supply is
isolated from the output, the output voltage drops. Once
the output is dropped to about 1.58V (lower limit), the
device returns to regular switching mode with one
quarter of each switch turning on first. Another quarter
of each switch is turned on if VOUT cannot reach
regulation by the third charge cycle. Full switch
operation occurs only during star-up or under heavy-
load condition, when half switch operation cannot
achieve regulation within seven charge cycles.
Soft-Start
The soft-start feature limits inrush current when the
device is initially powered up and enabled. The
reference voltage is used to control the rate of the
output voltage ramp-up to its final value. Typical start-up
time is 1ms. Since the rate of the output voltage ramp-
up is controlled by an internally generated slow ramp,
pulse-skipping
occurs
and
inrush
current
is
automatically limited.


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