전자부품 데이터시트 검색엔진 |
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FPF2110 데이터시트(PDF) 10 Page - Fairchild Semiconductor |
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FPF2110 데이터시트(HTML) 10 Page - Fairchild Semiconductor |
10 / 12 page 10 www.fairchildsemi.com FPF2108-FPF2110 Rev. E Application Information Typical Application OFF ON ON VIN GND FPF2108 - FPF2110 FLAGB VOUT LOAD Battery 1.8V-5.5V C1 = 4.7µF R1 = 100KΩ C2 = 0.1 µF R2 = 499Ω Input Capacitor To limit the voltage drop on the input supply caused by transient in-rush currents when the switch turns-on into a discharged load capacitor or a short-circuit, a capacitor needs to be placed between VIN and GND. A 4.7µF ceramic capacitor, CIN, must be placed close to the VIN pin. A higher value of CIN can be used to further reduce the voltage drop experienced as the switch is turned on into a large capacitive load. Output Capacitor A 0.1µF capacitor COUT, should be placed between VOUT and GND. This capacitor will prevent parasitic board inductances from forcing VOUT below GND when the switch turns-off. Power Dissipation During normal operation as a switch, the power dissipation is small and has little effect on the operating temperature of the part. The parts with the higher current limits will dissipate the most power and that will only typically be, When in current limit the maximum power dissipation will occur when the output is shorted to ground. A short on the output will cause the part to operate in a constant current state until the thermal shutdown activates. It will then cycle in and out of thermal shutdown so long as the ON pin is active and the short is present. Board Layout For best performance, all traces should be as short as possible. To be most effective, the input and output capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on normal and short-circuit operation. Using wide traces for VIN, VOUT and GND will help minimize parasitic electrical effects along with minimizing the case to ambient thermal impedance. 80mW 0.125 (0.8) R ) (I P 2 2 DS LIM = ∗ = ∗ = |
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