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TDA7551 데이터시트(PDF) 4 Page - STMicroelectronics |
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TDA7551 데이터시트(HTML) 4 Page - STMicroelectronics |
4 / 12 page N. Name Type Description 36 GPIO1 I/O General Purpose I/O 37 GPIO0 I/O General Purpose I/O 38 GPIO5 I/O General Purpose I/O 39 DBCK I/O Debug port Bit Clock/Chip Status 1. The serial clock for the Debug Port is provided. May also be used as GPIO9. 40 DBIN I/O Debug port Serial Input/Chip Status 0. The serial data input for the Debug Port is provided. May also be used as GPIO11. 41 DBOUT I/O Debug Port Serial Output. This pin is the serial Data output for the Debug port. May also be used as GPIO10. 42 DBRQN I Debug Port Request Input. This pin is used to request Debug Mode operation to Euterpe 43 NRESET I System Reset. A low level applied to RESET input initializes the IC. 44 INTN I External interrupt line. When this line is asserted low the DSP may be interrupted. 45 SCL/SCK I/O I 2C Serial Clock Line. Clock line for I2C bus. Schmitt trigger input. I/O SPI Bit Clock. If SPI interface is enabled, it behaves as SPI bit clock. 46 SDA/SS I/O I 2C Serial Data Line. Data line for I2C bus. Schmitt trigger input. I SPI Slave Select. If SPI interface is enabled, it behaves as Slave select line for SPI bus. 47 VDD I Digital Power Supply 48 GND I Ground 49 GPIO2 I/O General Purpose I/O 50 GPIO6 I/O General Purpose I/O 51 GPIO3 I/O General Purpose I/O 52 CGND I Ground for the internal CODEC cell 53 CVDD I Power Supply for the internal CODEC cell 54 VOUTR O Single-ended right channel analogue output from DAC 55 VOUTL O Single-ended left channel analogue output from DAC 56 VDD I Digital power supply 57 GND I Ground 58 VINR I Single-ended right channel analogue input to ADC 59 VINL I Single-ended left channel analogue input to ADC 60 CGNDA I Ground for the internal CODEC cell 61 TEST4 O Connect a 22K pull-down resistor 62 CVDDA I Power Supply for the internal CODEC cell 63 VREF O Voltage Reference from the CODEC cell 64 REFCAP O Voltage Reference Capacitor Bypass 65 GPIO7 I/O General Purpose I/O 66 GPIO4 I/O General Purpose I/O 67 VDD I Digital power supply 68 CLKOUT O Clock Output. Output Clock divided down from PLL PIN FUNCTIONS (continued) TDA7550R - TDA7550 - TDA7551 - TDA7552 - TDA7553 4/12 |
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