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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TDA9110 데이터시트(PDF) 5 Page - STMicroelectronics |
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TDA9110 데이터시트(HTML) 5 Page - STMicroelectronics |
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5 / 29 page  ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VCC Supply Voltage (Pin 29) 13.5 V VDD Supply Voltage (Pin 32) 5.7 V VIN Max Voltage on Pin 12 Pin 5 Pin 16 Pin 7 Pins 8, 9, 14, 20, 22 Pin 15, 18, 23, 24, 25, 26, 28 Pins 1, 2, 3, 4, 30, 31 1.8 4.0 5.5 6.4 8.0 VCC VDD V V V V V V V VESD ESD susceptibility Human Body Model,100pF Discharge through 1.5k Ω EIAJ Norm,200pF Discharge through 0 Ω 2 300 kV V HSize Cur Max. Sourced Current (Pin 28) Max. Sunk Current (Pin 28) 2.5 100 mA µA Tstg Storage Temperature -40, +150 oC Tj Junction Temperature +150 oC Toper Operating Temperature 0, +70 oC THERMAL DATA Symbol Parameter Value Unit Rth (j-a) Junction-ambient Thermal Resistance Max. 65 oC/W SYNCHRO PROCESSOR Operating Conditions (VDD =5V, Tamb =25 oC) Symbol Parameter Test Conditions Min. Typ. Max. Unit HsVR Horizontal Synchro Input Voltage Pin 1 0 5 V MinD Minimum Horizontal Input Pulses Duration Pin 1 0.7 µs Mduty Maximum Horizontal Input Signal Duty Cycle Pin 1 25 % VsVR Vertical Synchro Input Voltage Pin 2 0 5 V VSW Minimum Vertical Synchro Pulse Width Pin 2 5 µs VSmD Maximum Vertical Synchro Input Duty Cycle Pin 2 15 % VextM Maximum Vertical Synchro Width on TTL H/Vcomposite Pin 1 750 µs Electrical Characteristics (VDD =5V, Tamb =25 oC) Symbol Parameter Test Conditions Min. Typ. Max. Unit VINTH Horizontal and Vertical Input Threshold Voltage (Pins 1, 2) Low Level High Level 2.2 0.8 V V RIN Horizontal and Vertical Pull-Up Resistor Pins 1, 2 200 k Ω VOut Output Voltage (Pin 4) Low level High Level 0 5 V V TfrOut Falling and Rising Output CMOS Buffer Pin 4, Cout = 20pF 200 ns VHlock Horizontal 1st PLL Lock Output Status (Pin 4) Locked Unlocked 0 5 V V VoutT Extracted Vsync Integration Time (% of TH) on H/V Composite C0 = 820pF 26 35 % I 2C READ/WRITE Electrical Characteristics (VDD =5V,Tamb =25 oC) Symbol Parameter Test Conditions Min. Typ. Max. Unit I 2C PROCESSOR Fscl Maximum Clock Frequency Pin 30 400 kHz Tlow Low period of the SCL Clock Pin 30 1.3 µs Thigh High period of the SCL Clock Pin 30 0.6 µs Vinth SDA and SCL Input Threshold Pins 30,31 2.2 V VACK Acknowledge Output Voltage on SDA input with 3mA Pin 31 0.4 V See also I 2C Table Control and I2C Sub Address Control TDA9110 5/29 |
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유사한 설명 - TDA9110 |
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