전자부품 데이터시트 검색엔진 |
|
AD1882AJCPZ 데이터시트(PDF) 11 Page - Analog Devices |
|
AD1882AJCPZ 데이터시트(HTML) 11 Page - Analog Devices |
11 / 20 page AD1882A Rev. 0 | Page 11 of 20 | August 2008 DIGITAL MICROPHONE INTERFACE TIMING SPECIFICATIONS The digital microphone interface can support one or two digital microphones using two or three codec pins. Both uniplex (one microphone per data pin) and multiplex (two microphones sharing the same data pin) are supported. The timing for these configurations are shown in Figure 3 and Figure 4. The interface can generate a microphone clock at 1.5 MHz, 2.0 MHz, or 3.0 MHz to suit quality and power requirements. Table 7. Microphone Timing Parameters Parameter Min Typ Max Unit Timing Requirements t0 DM_CLK (1.5 MHz) Period Duty Cycle 667 50/50 ns % t0 DM_CLK (2.0 MHz) Period Duty Cycle 500 50/50 ns % t0 DM_CLK (3.0 MHz) Period Duty Cycle 333 50/50 ns % t1 DM_CLK Rise Time 5 ns t2 DM_CLK Fall Time 5ns t3 Data Setup to DM_CLK Edge 100 ns t4 Data Hold from DM_CLK Edge 5 ns Figure 3. Uniplex Microphone Timing Figure 4. Multiplex Microphone Timing DM_CLK t1 t2 t3 DM_DATA t0 t4 DM_CLK t1 t2 t3 DM_DATA t0 LEFT DATA VALID RIGHT DATA VALID LEFT DATA VALID t4 t3 t4 |
유사한 부품 번호 - AD1882AJCPZ |
|
유사한 설명 - AD1882AJCPZ |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |