CDB42L52 datasheet(4/82 Pages) CIRRUS

부품명	CDB42L52

상세설명	2Low-power, Stereo CODEC w/ Headphone & Speaker Amps

Download	82 Pages

Scroll/Zoom	100%

제조업체	CIRRUS [Cirrus Logic]

홈페이지	http://www.cirrus.com

Logo

4 / 82 page

4

DS680F1

CS42L52

5/13/08

4.12.1 I²C Control ........................................................................................................................... 38

4.12.2 Memory Address Pointer (MAP) .......................................................................................... 39

4.12.2.1 Map Increment (INCR) ............................................................................................. 39

5. REGISTER QUICK REFERENCE ........................................................................................................ 40

6. REGISTER DESCRIPTION .................................................................................................................. 42

6.1 Chip I.D. and Revision Register (Address 01h) (Read Only) ......................................................... 42

6.1.1 Chip I.D. (Read Only) ............................................................................................................ 42

6.1.2 Chip Revision (Read Only) .................................................................................................... 42

6.2 Power Control 1 (Address 02h) ...................................................................................................... 42

6.2.1 Power Down ADC Charge Pump .......................................................................................... 42

6.2.2 Power Down PGAx ................................................................................................................ 42

6.2.3 Power Down ADCx ................................................................................................................ 43

6.2.4 Power Down .......................................................................................................................... 43

6.3 Power Control 2 (Address 03h) ...................................................................................................... 43

6.3.1 Power Down ADC Override ................................................................................................... 43

6.3.2 Power Down MICx ................................................................................................................. 43

6.3.3 Power Down MIC Bias .......................................................................................................... 43

6.4 Power Control 3 (Address 04h) ...................................................................................................... 44

6.4.1 Headphone Power Control .................................................................................................... 44

6.4.2 Speaker Power Control ......................................................................................................... 44

6.5 Clocking Control (Address 05h) ...................................................................................................... 44

6.5.1 Auto-Detect ........................................................................................................................... 44

6.5.2 Speed Mode .......................................................................................................................... 45

6.5.3 32kHz Sample Rate Group ................................................................................................... 45

6.5.4 27 MHz Video Clock .............................................................................................................. 45

6.5.5 Internal MCLK/LRCK Ratio ................................................................................................... 45

6.5.6 MCLK Divide By 2 ................................................................................................................. 46

6.6 Interface Control 1 (Address 06h) .................................................................................................. 46

6.6.1 Master/Slave Mode ............................................................................................................... 46

6.6.2 SCLK Polarity ........................................................................................................................ 46

6.6.3 ADC Interface Format ........................................................................................................... 46

6.6.4 DSP Mode ............................................................................................................................. 46

6.6.5 DAC Interface Format ........................................................................................................... 47

6.6.6 Audio Word Length ................................................................................................................ 47

6.7 Interface Control 2 (Address 07h) .................................................................................................. 47

6.7.1 SCLK equals MCLK .............................................................................................................. 47

6.7.2 SDOUT to SDIN Digital Loopback ......................................................................................... 47

6.7.3 Tri-State Serial Port Interface ................................................................................................ 48

6.7.4 Speaker/Headphone Switch Invert ........................................................................................ 48

6.7.5 MIC Bias Level ...................................................................................................................... 48

6.8 Input x Select: ADCA and PGAA (Address 08h), ADCB and PGAB (Address 09h) ....................... 48

6.8.1 ADC Input Select ................................................................................................................... 48

6.8.2 PGA Input Mapping ............................................................................................................... 49

6.9 Analog & HPF Control (Address 0Ah) ............................................................................................ 49

6.9.1 ADCx High-Pass Filter .......................................................................................................... 49

6.9.2 ADCx High-Pass Filter Freeze .............................................................................................. 49

6.9.3 Ch. x Analog Soft Ramp ........................................................................................................ 49

6.9.4 Ch. x Analog Zero Cross ....................................................................................................... 49

6.10 ADC HPF Corner Frequency (Address 0Bh) ................................................................................ 50

6.10.1 HPF x Corner Frequency .................................................................................................... 50

6.11 Misc. ADC Control (Address 0Ch) ................................................................................................ 50

6.11.1 Analog Front-End Volume Setting B=A ............................................................................... 50

6.11.2 Digital MUX ......................................................................................................................... 50

6.11.3 Digital Sum .......................................................................................................................... 50

유사한 부품 번호 - CDB42L52

제조업체	부품명	데이터시트	상세설명
Cirrus Logic	CDB42L52	4Mb / 26P	Evaluation Board
Cirrus Logic	CDB42L52	1Mb / 82P	Low Power, Stereo CODEC w/Headphone & Speaker Amps

More results

유사한 설명 - CDB42L52

제조업체	부품명	데이터시트	상세설명
Cirrus Logic	CS42L52	1Mb / 82P	Low Power, Stereo CODEC w/Headphone & Speaker Amps
	CS43L22	1Mb / 68P	Low Power, Stereo DAC w/Headphone & Speaker Amps
	CS43L22	695Kb / 66P	Low Power, Stereo DAC w/Headphone & Speaker Amps
Protek Devices	PA5750	300Kb / 30P	Low Power Stereo Audio CODEC With Speaker and Headphone Amplifier.
Texas Instruments	TLV320AIC29	1Mb / 88P	[Old version datasheet] STEREO AUDIO CODEC WITH INTEGRATED HEADPHONE AND SPEAKER AMPLIFIERS
	TLV320AIC29	1Mb / 87P	[Old version datasheet] STEREO AUDIO CODEC WITH INTEGRATED HEADPHONE AND SPEAKER AMPLIFIERS
	TLV320AIC28	792Kb / 81P	[Old version datasheet] STEREO AUDIO CODEC WITH INTERGRATED HEADPHONE AND SPEAKER AMPLIFIERS
	TLV320AIC28	1Mb / 85P	[Old version datasheet] STEREO AUDIO CODEC WITH INTEGRATED HEADPHONE AND SPEAKER AMPLIFIERS
Cirrus Logic	CS42L55	1Mb / 73P	Ultra Low Power, Stereo CODEC w/Class H Headphone Amp
Sanyo Semicon Device	LA4820M	677Kb / 20P	Monaural Speaker/Stereo Headphone Power Amplifier

More results

CDB42L52 데이터시트(PDF) 4 Page - Cirrus Logic

CDB42L52 데이터시트(HTML) 4 Page - Cirrus Logic

유사한 부품 번호 - CDB42L52

유사한 설명 - CDB42L52

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

데이터시트 다운로드

링크 URL