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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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CDB5368 데이터시트(PDF) 7 Page - Cirrus Logic |
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CDB5368 데이터시트(HTML) 7 Page - Cirrus Logic |
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7 / 41 page  DS624F3 7 CS5368 Pin Name Pin # Pin Description AIN2+, AIN2- AIN4+, AIN4- AIN3+, AIN3- AIN7+, AIN7- AIN8+, AIN8- AIN6+, AIN6- AIN5+, AIN5- AIN1+, AIN1- 1,2 11,12 13,14 15,16 17,18 43,44 45,46 47,48 Differential Analog (Inputs) - Audio signals are presented differently to the delta sigma modula- tors via the AIN+/- pins. GND 3,8 10,19 29,32 Ground (Input) - Ground reference. Must be connected to analog ground. VA 4,9 Analog Power (Input) - Positive power supply for the analog section REF_GND 5 Reference Ground (Input) - For the internal sampling circuits. Must be connected to analog ground. FILT+ 6 Positive Voltage Reference (Output) - Reference voltage for internal sampling circuits. VQ 7 Quiescent Voltage (Output) - Filter connection for the internal quiescent reference voltage. VX 20 Crystal Oscillator Power (Input) - Also powers control logic to enable or disable oscillator cir- cuits. XTI XTO 21 22 Crystal Oscillator Connections (Input/Output) - I/O pins for an external crystal which may be used to generate MCLK. MCLK 23 System Master Clock (Input/Output) - When a crystal is used, this pin acts as a buffered MCLK Source (Output). When the oscillator function is not used, this pin acts as an input for the system master clock. In this case, the XTI and XTO pins must be tied low. LRCK/FS 24 Serial Audio Channel Clock (Input/Output) In I²S Mode, Serial Audio Channel Select. When low, the odd channels are selected. In LJ Mode, Serial Audio Channel Select. When high, the odd channels are selected. In TDM Mode, a frame sync signal. When high, it marks the beginning of a new frame of serial audio samples. In Slave Mode, this pin acts as an input pin. SCLK 25 Main timing clock for the Serial Audio Interface (Input/Output) - During Master Mode, this pin acts as an output, and during Slave Mode it acts as an input pin. SDOUT4 26 Serial Audio Data (Output) - Channels 7,8. SDOUT2 27 Serial Audio Data (Output) - Channels 3,4. VLS 28 Serial Audio Interface Power (Input) - Positive power for the serial audio interface. SDOUT1/TDM 30 Serial Audio Data (Output) - Channels 1,2. SDOUT3/TDM 31 Serial Audio Data (Output) - Channels 5,6. TDM is complementary TDM data. VD 33 Digital Power (Input) - Positive power supply for the digital section. VLC 35 Control Port Interface Power(Input) - Positive power for the control port interface. OVFL 36 Overflow (Output, open drain) - Detects an overflow condition on both left and right channels. RST 41 Reset (Input) - The device enters a low power mode when low. Stand-Alone Mode CLKMODE 34 CLKMODE (Input) - Setting this pin HIGH places a divide-by-1.5 circuit in the MCLK path to the core device circuitry. DIF1 DIF0 37 38 DIF1, DIF0 (Input) - Inputs of the audio interface format. M1 M0 39 40 Mode Selection (Input) - Determines the operational mode of the device. MDIV 42 MCLK Divider (Input) - Setting this pin HIGH places a divide-by-2 circuit in the MCLK path to the core device circuitry. |
유사한 부품 번호 - CDB5368 |
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유사한 설명 - CDB5368 |
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