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11 / 15 page D95IN353 + - + RA 1 7 f= R BIAS OSC C 6 VREF R R B + - + - EA R 2R R S Q 84 5 2 3 5K 5K 5K NE555 8 4 2 1 5 TO ADDITIONAL UCX84XAs 1.44 (RA +2RB)C Dmax = RB RA +2RB Figure 22: External Duty Cycle Clamp and Multi Unit Synchronization. D95IN352 + - EA + R 2R 5 RT 1 2 EXTERNAL SYNC INPUT The diode clamp is required if the Sync amplitude is large enough to cause the bottom side of CT to go more than 300mV below ground R BIAS OSC CT 0.01 µF 47 Ω 4 8 VREF R Figure 21: External Clock Synchronization. UCX84XAs UC2842A/3A/4A/5A - UC3842A/3A/4A/5A 11/15 |
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