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ATMEGA8-16PU 데이터시트(PDF) 73 Page - ATMEL Corporation |
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ATMEGA8-16PU 데이터시트(HTML) 73 Page - ATMEL Corporation |
73 / 308 page 73 2486T–AVR–05/08 ATmega8(L) Timer/Counter Interrupt Flag Register – TIFR • Bit 0 – TOV0: Timer/Counter0 Overflow Flag The bit TOV0 is set (one) when an overflow occurs in Timer/Counter0. TOV0 is cleared by hard- ware when executing the corresponding interrupt Handling Vector. Alternatively, TOV0 is cleared by writing a logic one to the flag. When the SREG I-bit, TOIE0 (Timer/Counter0 Overflow Interrupt Enable), and TOV0 are set (one), the Timer/Counter0 Overflow interrupt is executed. Bit 765 4321 0 OCF2 TOV2 ICF1 OCF1A OCF1B TOV1 – TOV0 TIFR Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 000 0000 0 |
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