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TS80C31X2-LIC 데이터시트(PDF) 1 Page - ATMEL Corporation |
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TS80C31X2-LIC 데이터시트(HTML) 1 Page - ATMEL Corporation |
1 / 42 page Features • 80C31 Compatible • 8031 pin and instruction compatible • Four 8-bit I/O ports • Two 16-bit timer/counters • 128 bytes scratchpad RAM • High-Speed Architecture • 40 MHz @ 5V, 30MHz @ 3V • X2 Speed Improvement capability (6 clocks/machine cycle) • 30 MHz @ 5V, 20 MHz @ 3V (Equivalent to 60 MHz @ 5V, 40 MHz @ 3V) • Dual Data Pointer • Asynchronous port reset • Interrupt Structure with • 5 Interrupt sources, • 4 priority level interrupt system • Full duplex Enhanced UART • Framing error detection • Automatic address recognition • Power Control modes • Idle mode • Power-down mode • Power-off Flag • Once mode (On-chip Emulation) • Power supply: 4.5-5.5V, 2.7-5.5V • Temperature ranges: Commercial (0 to 70oC) and Industrial (-40 to 85oC) • Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP F1 (13.9 footprint) 1. Description TS80C31X2 is high performance CMOS and ROMless versions of the 80C51 CMOS single chip 8-bit microcontroller. The TS80C31X2 retains all features of the TSC80C31 with 128 bytes of internal RAM, a 5-source, 4 priority level interrupt system, an on-chip oscilator and two timer/counters. In addition, the TS80C31X2 has a dual data pointer, a more versatile serial channel that facilitates multiprocessor communication (EUART) and a X2 speed improvement mechanism. The fully static design of the TS80C31X2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data. The TS80C31X2 has 2 software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial port and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative. 8-bit CMOS Microcontroller ROMless TS80C31X2 AT80C31X2 4428E–8051–02/08 |
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