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A3P030-FVQG144PP 데이터시트(Datasheet) 81 Page - Actel Corporation

부품명 A3P030-FVQG144PP
상세내용  ProASIC3 Flash Family FPGAs
PDF  206 Pages
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제조사  ACTEL [Actel Corporation]
홈페이지  http://www.actel.com
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 81 page
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ProASIC3 DC and Switching Characteristics
v1.3
2 - 67
Output Register
Timing Characteristics
Figure 2-17 • Output Register Timing Diagram
Preset
Clear
DOUT
CLK
Data_out
Enable
t
OSUE
50%
50%
t
OSUD tOHD
50%
50%
t
OCLKQ
1
0
t
OHE
t
ORECPRE
t
OREMPRE
t
ORECCLR
t
OREMCLR
t
OWCLR
t
OWPRE
t
OPRE2Q
t
OCLR2Q
t
OCKMPWH tOCKMPWL
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
Table 2-90 • Output Data Register Propagation Delays
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V
Parameter
Description
–2
–1
Std.
–F
Units
tOCLKQ
Clock-to-Q of the Output Data Register
0.59 0.67 0.79 0.95
ns
tOSUD
Data Setup Time for the Output Data Register
0.31 0.36 0.42 0.50
ns
tOHD
Data Hold Time for the Output Data Register
0.00 0.00 0.00 0.00
ns
tOSUE
Enable Setup Time for the Output Data Register
0.44 0.50 0.59 0.70
ns
tOHE
Enable Hold Time for the Output Data Register
0.00 0.00 0.00 0.00
ns
tOCLR2Q
Asynchronous Clear-to-Q of the Output Data Register
0.80 0.91 1.07 1.29
ns
tOPRE2Q
Asynchronous Preset-to-Q of the Output Data Register
0.80 0.91 1.07 1.29
ns
tOREMCLR
Asynchronous Clear Removal Time for the Output Data Register
0.00 0.00 0.00 0.00
ns
tORECCLR
Asynchronous Clear Recovery Time for the Output Data Register
0.22 0.25 0.30 0.36
ns
tOREMPRE
Asynchronous Preset Removal Time for the Output Data Register
0.00 0.00 0.00 0.00
ns
tORECPRE
Asynchronous Preset Recovery Time for the Output Data Register
0.22 0.25 0.30 0.36
ns
tOWCLR
Asynchronous Clear Minimum Pulse Width for the Output Data
Register
0.22 0.25 0.30 0.36
ns
tOWPRE
Asynchronous Preset Minimum Pulse Width for the Output Data
Register
0.22 0.25 0.30 0.36
ns
tOCKMPWH Clock Minimum Pulse Width HIGH for the Output Data Register
0.36 0.41 0.48 0.57
ns
tOCKMPWL Clock Minimum Pulse Width LOW for the Output Data Register
0.32 0.37 0.43 0.52
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating
values.




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