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CD74HC174E 데이터시트(PDF) 1 Page - Texas Instruments

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부품명 CD74HC174E
상세설명  High Speed CMOS Logic Hex D-Type Flip-Flop with Reset
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Data sheet acquired from Harris Semiconductor
SCHS159
Features
• Buffered Positive Edge Triggered Clock
• Asynchronous Common Reset
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Description
The Harris CD74HC174 and CD74HCT174 are edge
triggered flip-flops which utilize silicon gate CMOS circuitry to
implement D-type flip-flops. They possess low power and
speeds comparable to low power Schottky TTL circuits. The
devices contain six master-slave flip-flops with a common
clock and common reset. Data on the D input having the
specified setup and hold times is transferred to the Q output
on the low to high transition of the CLOCK input. The MR
input, when low, sets all outputs to a low state.
Each output can drive ten low power Schottky TTL
equivalent loads. The CD74HCT174 is functional as well as,
pin compatible to the 74LS174.
Pinout
CD74HC174, CD74HCT174
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
PKG.
NO.
CD74HC174E
-55 to 125
16 Ld PDIP
E16.3
CD74HCT174E
-55 to 125
16 Ld PDIP
E16.3
CD74HC174M
-55 to 125
16 Ld SOIC
M16.15
CD74HCT174M
-55 to 125
16 Ld SOIC
M16.15
CD74HCT174W
-55 to 125
Wafer
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Die for this part number is available which meets all electrical
specifications. Please contact your local sales office or Harris
customer service for ordering information.
MR
Q0
D0
D1
Q1
D2
GND
VCC
Q5
D5
D4
Q4
D3
Q3
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
CP
Q2
August 1997
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
CD74HC174,
CD74HCT174
High Speed CMOS Logic
Hex D-Type Flip-Flop with Reset
File Number
1608.1
[ /Title
(CD74
HC174
,
CD74
HCT17
4)
/Sub-
ject
(High
Speed
CMOS
Logic
Hex D-
Type
Flip-
Flop


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