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SN74ABT162827ADGG 데이터시트(PDF) 2 Page - Texas Instruments

부품명 SN74ABT162827ADGG
상세설명  20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
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SN54ABT162827A, SN74ABT162827A
20BIT BUFFERS/DRIVERS
WITH 3STATE OUTPUTS
SCBS248F − JULY 1993 − REVISED JUNE 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
To ensure the high-impedance state during power up or power down, OE shall be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each 10-bit buffer)
INPUTS
OUTPUT
OE1
OE2
A
OUTPUT
Y
L
L
L
L
L
LH
H
H
XX
Z
X
H
X
Z
logic diagram (positive logic)
1Y1
2
1
55
1OE1
1OE2
56
2Y1
15
28
42
29
2OE1
2OE2
To Nine Other Channels
To Nine Other Channels
1A1
2A1
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC
−0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1)
−0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or power-off state, VO
−0.5 V to 5.5 V
. . . . . . . . . . . . . . . . . . .
Current into any output in the low state, IO
30 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0)
−18 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0)
−50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 2): DGG package
64
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package
56
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
−65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.


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