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SN74AS161 데이터시트(PDF) 5 Page - Texas Instruments |
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SN74AS161 데이터시트(HTML) 5 Page - Texas Instruments |
5 / 14 page SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, SN54AS163 SN74ALS161B, SN74ALS163B, SN74AS161, SN74AS163 SYNCHRONOUS 4-BIT DECADE AND BINARY COUNTERS SDAS276 – DECEMBER 1994 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 typical clear, preset, count, and inhibit sequences SN54ALS162B The following sequence is illustrated below: 1. Clear outputs to zero (SN54ALS162B is synchronous) 2. Preset to BCD 7 3. Count to 8, 9, 0, 1, 2, and 3 4. Inhibit Data Inputs Data Outputs CLR LOAD A B C D CLK ENP ENT RCO QA QB QC QD Async Clear Sync Clear Preset Count Inhibit 78 90 1 2 3 |
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