SN74ACT7805-40DL datasheet(10/14 Pages) TI

부품명	SN74ACT7805-40DL

상세설명	256 횞 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY

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제조업체	TI [Texas Instruments]

홈페이지	http://www.ti.com

Logo

10 / 14 page

SN74ACT7805

256

× 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY

SCAS201B – MARCH 1991 – REVISED APRIL 1998

10

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

timing requirements over recommended operating conditions (unless otherwise noted) (see

Figures 1 through 5)

’ACT7805-15

’ACT7805-20

’ACT7805-25

’ACT7805-40

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

fclock

Clock frequency

67

50

40

25

MHz

WRTCLK high or low

6

7

8

12

tw

Pulse duration

RDCLK high or low

6

7

8

12

ns

PEN low

8

9

12

D0–D17 before WRTCLK

↑

4

5

WRTEN1, WRTEN2

before WRTCLK

↑

4

5

OE1, OE2 before RDCLK

↑

5

6

tsu

Setup time

RDEN before RDCLK

↑

4

5

ns

tsu

Setu time

Reset: RESET low before first

WRTCLK

↑ and RDCLK↑†

5

6

ns

PEN before WRTCLK

↑

5

6

Define AF/AE: PEN

before WRTCLK

↑

5

6

D0–D17) after WRTCLK

↑

0

WRTEN1, WRTEN2

after WRTCLK

↑

0

th

Hold time

OE1, OE2, RDEN after RDCLK

↑

0

ns

th

Hold time

Reset: RESET low after fourth

WRTCLK

↑ and RDCLK↑†

2

ns

Define AF/AE: PEN

after WRTCLK

↑

2

† To permit the clock pulse to be utilized for reset purposes

switching characteristics over recommended ranges of supply voltage and operating free-air

temperature, CL = 50 pF (unless otherwise noted) (see Figure 5)

PARAMETER

FROM

TO

’ACT7805-15

’ACT7805-20

’ACT7805-25

’ACT7805-40

UNIT

PARAMETER

(INPUT)

(OUTPUT)

MIN

TYP†

MAX

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

fmax

WRTCLK or

RDCLK

67

50

40

25

MHz

tpd

RDCLK

↑

Any Q

4

9.5

12

4

13

4

15

4

20

ns

tpd‡

RDCLK

↑

Any Q

8.5

ns

WRTCLK

↑

IR

3

8.5

3

11

3

13

3

15

t d

RDCLK

↑

OR

3

8.5

3

11

3

13

3

15

ns

tpd

WRTCLK

↑

AF/AE

7

16.5

7

19

7

21

7

23

ns

RDCLK

↑

AF/AE

7

17

7

19

7

21

7

23

tPLH

WRTCLK

↑

HF

7

15

7

17

7

19

7

21

ns

tPHL

RDCLK

↑

HF

7

15.5

7

18

7

20

7

22

ns

tPLH

RESET low

AF/AE

2

9

2

11

2

13

2

15

ns

tPHL

RESET low

HF

2

10

2

12

2

14

2

16

ns

ten

OE1, OE2

Any Q

2

8.5

2

11

2

11

2

11

ns

tdis

OE1, OE2

Any Q

2

9.5

2

11

2

14

2

14

ns

‡ This parameter is measured with a 30-pF load (see Figure 6).

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SN74ACT7805-40DL 데이터시트(PDF) 10 Page - Texas Instruments

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