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TSB12LV21 데이터시트(PDF) 2 Page - Texas Instruments |
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TSB12LV21 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 18 page TSB12LV21A (PCILynx) IEEE 1394-1995 BUS TO PCI BUS INTERFACE SLLS273 – APRIL 1997 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) The RAM, ROM, AUX, ZV, and general purpose I/O (GPIO) ports collectively implement the local bus interface. These ports are mapped into the PCI address can be accessed either through the PCI bus or internal DMA transactions. Internal transactions do not appear on the external PCI bus, thereby conserving PCI bandwidth. DMA packet control lists or other data that may be stored in external RAM or ROM attached to the local bus interface. This further reduces PCI use and generally improves performance. The ZV local bus port is designed to transfer data from 1394 video devices to an external device connected to the PCILynx ZV port. This interface provides a method of receiving 1394 digital camera packets directly to a ZV-compliant device attached to the local bus interface. Built-in test registers, a dedicated test output terminal, and four GPIO terminals allow observation of internal states and provides a convenient software debug capability. Programmable interrupts are available to inform driver software of important events such as 1394 bus resets and DMA-to-PCL transfer completion. The 3.3-V internal operation provides reduced power consumption while maintaining compatibility with 5-V signaling environments. The PCI interface is compatible with both 3-V and 5-V PCI systems. |
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