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PCA2003 데이터시트(PDF) 16 Page - NXP Semiconductors |
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PCA2003 데이터시트(HTML) 16 Page - NXP Semiconductors |
16 / 21 page PCA2003_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 21 July 2009 16 of 21 NXP Semiconductors PCA2003 32 kHz watch circuit with programmable adaptive motor pulse 9. Characteristics [1] P1 + ... + P4 + N1 + N2 (see Section 7.2). [2] RL and CL are a load resistor and load capacitor, externally connected to pad RESET. Table 10. Characteristics VDD = 1.55 V; VSS =0V; fosc = 32.768 kHz; Tamb =25 °C; quartz crystal: RS =40kΩ, C1 = 2 fF to 3 fF, CL = 8.2 pF; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Supply VDD supply voltage normal operating mode; Tamb = −10 °C to +60 °C 1.1 1.55 3.60 V ∆VDD supply voltage variation ∆V/∆t=1V/µs - - 0.25 V IDD supply current between motor pulses - 90 120 nA between motor pulses at VDD = 3.5 V - 120 180 nA Tamb = −10 °C to +60 °C - - 200 nA stop mode; pad RESET connected to VDD - 100 135 nA Motor output Vsat saturation voltage Rmotor =2kΩ; Tamb = −10 °C to +60 °C [1] - 150 200 mV Zo(sc) output impedance (short circuit) between motor pulses; Imotor <1mA - 200 300 Ω Oscillator Vstart start voltage 1.1 - - V gm transconductance Vi(osc) ≤ 50 mV (p-p) 5 10 - µS tstartup start-up time - 0.3 0.9 s ∆f/f frequency stability ∆VDD = 100 mV - 0.05 0.20 ppm CL(itg) integrated load capacitance 4.3 5.2 6.3 pF Rpar parasitic resistance allowed resistance between adjacent pads 20 --M Ω Pad RESET fo output frequency - 32 - Hz VO(dif) differential output voltage RL =1MΩ; CL =10pF [2] 1.4 - - V tr rise time RL =1MΩ; CL =10pF [2] -1 - µs tf fall time RL =1MΩ; CL =10pF [2] -1 - µs Ii(AV) average input current pad RESET connected to VDD or VSS - 1020nA |
유사한 부품 번호 - PCA2003_09 |
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유사한 설명 - PCA2003_09 |
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