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AD6642EBZ 데이터시트(PDF) 4 Page - Analog Devices

부품명 AD6642EBZ
상세설명  Dual IF Receiver
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AD6642
Rev. 0 | Page 4 of 32
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, fS = 185 MSPS, 1.75 V p-p differential input, VIN = −1.0 dBFS differential input, and default SPI, unless
otherwise noted.
Table 1.
Parameter
Temperature
Min
Typ
Max
Unit
RESOLUTION
Full
11
Bits
ACCURACY
No Missing Codes
Full
Guaranteed
Offset Error
Full
−4.5
2
7.4
mV
Gain Error
Full
±3
±7
% FSR
Differential Nonlinearity (DNL)1
Full
±0.1
±0.5
LSB
Integral Nonlinearity (INL)1
Full
±0.2
±0.5
LSB
MATCHING CHARACTERISTIC
Offset Error
Full
−2.4
2.5
8.3
mV
Gain Error
Full
±1
±3
% FSR
TEMPERATURE DRIFT
Offset Error
Full
2
ppm/°C
Gain Error
Full
40
ppm/°C
ANALOG INPUT
Input Range
Full
1.4
1.75
2.0
V p-p
Input Common-Mode Voltage
Full
0.9
V
Input Resistance (Differential)
Full
20
Input Capacitance2
Full
5
pF
POWER SUPPLIES
Supply Voltage
AVDD
Full
1.7
1.8
1.9
V
DRVDD
Full
1.7
1.8
1.9
V
Supply Current
IAVDD1
Full
265
291
mA
IDRVDD1 (1.8 V LVDS)
Full
79
89
mA
POWER CONSUMPTION
Sine Wave Input1
Full
619
684
mW
Standby Power3
Full
83
mW
Power-Down Power
Full
4.5
18
mW
1 Measured with a 10 MHz, 0 dBFS sine wave, with 100 Ω termination on each LVDS output pair.
2 Input capacitance refers to the effective capacitance between one differential input pin and AGND.
3 Standby power is measured with a dc input and the CLKx pins inactive (set to AVDD or AGND).


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