전자부품 데이터시트 검색엔진 |
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AD7999ARJZ-1RL 데이터시트(PDF) 5 Page - Analog Devices |
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AD7999ARJZ-1RL 데이터시트(HTML) 5 Page - Analog Devices |
5 / 28 page AD7991/AD7995/AD7999 Rev. A | Page 5 of 28 AD79951 The temperature range for the Y version is −40°C to +125°C. Unless otherwise noted, VDD = 2.7 V to 5.5 V, VREF = 2.5 V, fSCL = 3.4 MHz, and TA = TMIN to TMAX. Table 3. A Version2 Y Version Parameter Min Typ Max Min Typ Max Unit Test Conditions/Comments DYNAMIC PERFORMANCE3, 4 See the Sample Delay and Bit Trial Delay section, fIN = 10 kHz sine wave for fSCL from 1.7 MHz to 3.4 MHz fIN = 1 kHz sine wave for fSCL up to 400 kHz Signal-to-Noise and Distortion (SINAD)5 61.5 61 dB Total Harmonic Distortion (THD)5 −85 −75 dB Peak Harmonic or Spurious Noise (SFDR)5 −85 −76 dB Intermodulation Distortion (IMD)5 fa = 11 kHz, fb = 9 kHz for fSCL from 1.7 MHz to 3.4 MHz fa = 5.4 kHz, fb = 4.6 kHz for fSCL up to 400 kHz Second-Order Terms −90 −90 dB Third-Order Terms −86 −86 dB Channel-to-Channel Isolation5 −90 −90 dB fIN = 10 kHz Full-Power Bandwidth5 14 14 MHz @ 3 dB 1.5 1.5 MHz @ 0.1 dB DC ACCURACY3, 6 Resolution 10 10 Bits Integral Nonlinearity5 ±0.4 ±0.4 LSB Differential Nonlinearity5 ±0.4 ±0.4 LSB Guaranteed no missed codes to 10 bits Offset Error5 ±1 ±1.5 LSB Offset Error Matching ±0.04 ±0.2 LSB Offset Temperature Drift 4.13 4.13 ppm/°C Gain Error5 ±0.15 ±0.5 LSB Gain Error Matching ±0.06 ±0.25 LSB Gain Temperature Drift 0.50 0.50 ppm/°C ANALOG INPUT Input Voltage Range 0 VREF 0 VREF V VREF = VIN3/VREF or VDD DC Leakage Current ±1 ±1 μA Input Capacitance 34 34 pF Channel 0 to Channel 2—during acquisition phase 4 4 pF Channel 0 to Channel 2—outside acquisition phase 35 35 pF Channel 3—during acquisition phase 5 5 pF Channel 3—outside acquisition phase REFERENCE INPUT VREF Input Voltage Range 1.2 VDD 1.2 VDD V DC Leakage Current ±1 ±1 μA VREF Input Capacitance 5 5 pF Outside conversion phase 35 35 pF During conversion phase Input Impedance 69 69 kΩ |
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