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ACE24C256TM+UH 데이터시트(PDF) 4 Page - ACE Technology Co., LTD. |
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ACE24C256TM+UH 데이터시트(HTML) 4 Page - ACE Technology Co., LTD. |
4 / 16 page ACE24C128/256 Technology Two-wire Serial EEPROM VER 1.2 4 Ordering information Selection Guide ACE24C128/256 XX + X H Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. Serial Data (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open-collector devices. Device/Page Addresses (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hardwired or left not connected for hardware compatibility with other ACE24CXXX/ACE24CXXX devices. When the pins are hardwired, as many as eight 128K/256K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section).If the pins are left floating, the A2, A1 and A0 pins will be internally pulled down to GND if the capacitive coupling to the circuit board Vcc plane is < 3pF, if coupling is > 3pF recommends connecting the address pins to GND. Write Protect (WP): The ACE24C128/256 has a Write Provides hardware data protection. The WP pin allows normal write operations when connected to ground (GND). When the Write Protect pin is connected to Vcc. All write operations to the memory are inhibited. If the pin is left floating, the WP pin will be internally pulled is < 3pF , if coupling is > 3pF, recommends connecting the pins to GND. Switching WP to Vcc prior to a write operation creates a software write protected function. Write Protect Description Part of the Array Protected WP Pin Status ACE24C128 ACE24C256 WP=VCC Full (128K) Memory Full (256K) Memory WP=GND Normal Read/Write Operations Pb - free U : Tube T : Tape and Reel DP : PDIP-8 FM : SOP-8 TM : TSSOP-8 Halogen-free |
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