전자부품 데이터시트 검색엔진 |
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TS2GDOM44H 데이터시트(PDF) 6 Page - Transcend Information. Inc. |
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TS2GDOM44H 데이터시트(HTML) 6 Page - Transcend Information. Inc. |
6 / 9 page T T Tr rra a an n ns s sc c ce e en n nd d d 4 4 44 4 4---P P Piiin n n IIID D DE E E F F Fllla a as s sh h h M M Mo o od d du u ullle e e (((H H Ho o or rriiiz zzo o on n nttta a alll))) 1 1 12 2 28 8 8M M M ~ ~ ~ 4 4 4G G GB B B Transcend Information Inc. Ver 1.2 6 Pin Description Pin No. Signal I/O* Description 01 -RESET I Hardware reset signal from the host. 17, 15, 13, 11, 09, 07, 05, 03, 04, 06, 08, 10, 12, 14, 16, 18 DD0 ~ DD15 (Device Data) I/O 16-bit bi-direction Data Bus. DD(7:0) are used for 8-bit register transfers. 21 DMARQ (DMA Request) O For DMA data transfers. Device will assert DMARQ when the device is ready to transfer data to or from the host. -DIOW (I/O Write) This is the strobe signal used by the host to write to the device register or Data port. 23 STOP (Stop UDMA Burst) I The host asserts this signal during an UDMA burst to stop the DMA burst. -DIOR (I/O Read) This is the strobe signal used by the host to read from the device register or the Data port. -HDMARDY (UDMA ready) When UDMA mode DMA Read is ready, -HDMARDY should be asserted by the host to indicate that the host is ready to receive DMA data-in burst. 25 HSTROBE (UDMA Strobe) I HSTROBE receives the data-out strobe signal from the host for an UDMA burst. IORDY (I/O channel ready) This signal is used to temporarily stop the host register access (read or write) when the device is not ready to respond to a data transfer request. DDMARDY (UDMA ready) The device will assert this signal to indicate that the device is ready to receive UDMA data-out burst. 27 DSTROBE (UDMA data strobe) O When UDMA mode DMA Read is active, this signal is the data-in strobe generated by the device. 28 CSEL (Cable select) I This pin is used to configure this device as Device 0 or Device 1. When this pin is grounded, this device is configured as Device 0. When this pin is High, this device is configured as Device 1. 29 -DMACK (DMA acknowledge) I This signal is used by the host in response to DMARQ to initiate DMA transfer. 31 INTRQ (Interrupt) O When this device is selected, this signal is the active high Interrupt Request to the host. 32 IOCS16B O During PIO transfer mode 0, 1 or 2, this pin indicates to the host the 16-bit data port has been addressed and the device is prepared to send or receive a 16-bit data word. When transferring in PIO mode 3, 4, or above, this signal should not be used by the host, and all transfers will be 16-bit. When transferring in DMA mode, the host must use a 16-bit DMA channel and this signal will not be asserted. |
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