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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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VG3617161ET 데이터시트(PDF) 5 Page - Vanguard International Semiconductor |
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VG3617161ET 데이터시트(HTML) 5 Page - Vanguard International Semiconductor |
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5 / 69 page  Document:1G5-0189 Rev.1 Page 5 VIS VG3617161ET 1,048,576 x 16 - Bit CMOS Synchronous Dynamic RAM IDD Specifications (VDD = 3.3V 0.3V, TA = 0 ~ 70°C) Description/test condition Symbol -6 -7 -8 Unit Note Min Max Min Max Min Max Operating Current , outputs open Address changed once during tCK(min). Burst length = 1 (One bank active) IDD1 115 105 95 mA 3,4 Precharge Standby Current in non power-down mode (min), (min), tCK =tCK(min) Input signals are changed once during 2 clocks IDD2N 40 40 40 3 Precharge Standby Current in non power-down mode (min), tCK = , (max) Input signals are stable IDD2NS 35 35 35 Precharge Standby Current in power-down mode (max), tCK = tCK(min) IDD2P 2 2 2 Precharge Standby Current in power-down mode (max), tCK = , (max) IDD2PS 2 2 2 Active Standby Current in non power-down mode (min), CS VIH(min), tCK = tCK(min) Input signals are changed once during 2 clocks IDD3N 50 50 50 3 Active Standby Current in non power-down mode (min), tCK = , (max) Input signals are stable IDD3NS 40 40 40 Active Standby Current in power-down mode (max), tCK = tCK(min) IDD3P 35 35 35 Active Standby Current in power-down mode (max), tCK = , (max) IDD3PS 35 35 35 Operating Current (Page burst, and all banks activated) tCCD = tCCD(min), outputs open, gapless data IDD4 150 140 130 4,5 Refresh Current (min) (tREF = 64ms) IDD5 100 90 80 3 Self Refresh Current IDD6 1 1 1 ± t RC t R C min () ≥ CKEV IH ≥ CSV IH ≥ CKEV IH ≥ ∞ CLKV IL ≤ CKEV IL ≤ CKEV IL ≤ ∞ CLKV IL ≤ CKEV IH ≥ ≥ CKEV IH ≥ ∞ CLKV IL ≤ CKEV IL ≤ CKEV IL ≤ ∞ CLKV IL ≤ t RC t RC ≥ CKE 0.2V ≤ |
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