Technical Note

8/17

BU1850MUV

www.rohm.com

2009.09 - Rev.A

© 2009 ROHM Co., Ltd. All rights reserved.

2-6

Reading protocol

After Writing the slave address and Read/Write commend bits, the next byte is read. The reading register address

is next of previous accessed address. Therefore, the data is read with address increment. When the address in

increased to the last, the following read address will be reset to (00h).

Fig.9

Readout protocol

2-7

Complex reading protocol

After the specifying the internal register address, a repeated START condition occurs and the direction of data

transfer is changed then reading access is done. Therefore, the data is read followed by address increment. If the

address is increased to the last, it will be reset to (00h).

S

A

A

A

P

Transmit from master

Transmit from slave

A=acknowledge

A=not aclnowledge

S=Start condition

P=Stop condition

Sr=Repeated Start condition

R/W=0(write)

Sr

1

R/W=1(read)

A

Slave address

XX

XX

XX

0

X

Register address

X X X A4 A3 A2 A1 A0

Slave address

XX

XX

XXX

data

data

Register address

increment

D7 D6 D5 D4 D3 D2 D1 D0

Register address

increment

D7 D6 D5 D4 D3 D2 D1 D0 A

Fig.10

Complex reading protocol

2-8

Illegal access of I

The data accessed at that time is annulled, and access it again.

The illegal accesses are as follows.

 The START condition and the STOP condition are continuously generated.

 When the Slave address and the R/W bit is written, repeated START condition and the STOP

condition are generated.

 Repeated START condition and the STOP condition are generated while writing data.