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SS431NBTR 데이터시트(PDF) 4 Page - Silicon Standard Corp. |
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SS431NBTR 데이터시트(HTML) 4 Page - Silicon Standard Corp. |
4 / 7 page www.SiliconStandard.com 4 of 7 SS431/G APPLICATION INFORMATION TEST CIRCUITS T2 T1 VMAX VDEV = VMAX-VMIN VMIN TEMPERATURE Deviation of reference input voltage, V DEV, is defined as the maximum variation of the reference input voltage over the full temperature range. The average temperature coefficient of the reference in- put voltage, αV REF is defined as: T1 T2 10 C) 25 (at V V T1 T2 6 10 C) 25 (at V V - V C ppm V 6 REF DEV REF MIN MAX REF − ° ± = − ° ± = ° ∆ Where: T2−T1=full temperature change. αVREF can be positive or negative depending on whether the slope is positive or negative. Example: VDEV= 7.0mV, VREF= 2495mV, T2−T1= 105 °C, slope is negative. C 27ppm/ V C 105 6 10 2495mV 7.0mV REF ° − = = ° α Note 4. The dynamic output impedance, Rz, is de- fined as: RZ = Z Z V I ∆ ∆ When the device is programmed with two external re- sistors, R1 and R2, (see Fig. 2), the dynamic output impedance of the overall circuit, is defined as: [ ] R2 R1 1 Rz I V z r + ≅ ∆ ∆ = Rev.2.02 3/11/2004 |
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