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74ABT16240ADGG 데이터시트(PDF) 4 Page - NXP Semiconductors |
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74ABT16240ADGG 데이터시트(HTML) 4 Page - NXP Semiconductors |
4 / 14 page 74ABT16240A_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 25 March 2009 4 of 14 NXP Semiconductors 74ABT16240A 16-bit inverting buffer/line driver; 3-state 5.2 Pin description 6. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Table 2. Pin description Symbol Pin Description 1OE 1 1 output enable (LOW active) 1Y[0:3] 2, 3, 5, 6 1 data output 0 to output 3 GND 4 ground (0 V) VCC 7 supply voltage 2Y[0:3] 8, 9, 11, 12 2 data output 0 to output 3 GND 10 ground (0 V) 3Y[0:3] 13, 14, 16, 17 3 data output 0 to output 3 GND 15 ground (0 V) VCC 18 supply voltage 4Y[0:3] 19, 20, 22, 23 4 data output 0 to output 3 GND 21 ground (0 V) 4OE 24 4 output enable (LOW active) 3OE 25 3 output enable (LOW active) GND 28 ground (0 V) 4A[0:3] 30, 29, 27, 26 4 data input 0 to input 3 VCC 31 supply voltage GND 34 ground (0 V) 3A[0:3] 36, 35, 33, 32 3 data input 0 to input 3 GND 39 ground (0 V) 2A[0:3] 41, 40, 38, 37 2 data input 0 to input 3 VCC 42 supply voltage GND 45 ground (0 V) 1A[0:3] 47, 46, 44, 43 1 data input 0 to input 3 2OE 48 2 output enable (LOW active) Table 3. Function table[1] Control Input Output nOE nAx nYx LLH LH L HX Z |
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