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74AUP2G80GT 데이터시트(PDF) 2 Page - NXP Semiconductors |
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74AUP2G80GT 데이터시트(HTML) 2 Page - NXP Semiconductors |
2 / 20 page 74AUP2G80_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 2 June 2008 2 of 20 NXP Semiconductors 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger 3. Ordering information 4. Marking 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP2G80DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74AUP2G80GT −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74AUP2G80GD −40 °C to +125 °C XSON8U plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 3 × 2 × 0.5 mm SOT996-2 74AUP2G80GM −40 °C to +125 °C XQFN8U plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 × 1.6 × 0.5 mm SOT902-1 Table 2. Marking codes Type number Marking code 74AUP2G80DC p80 74AUP2G80GT p80 74AUP2G80GD p80 74AUP2G80GM p80 Fig 1. Logic symbol Fig 2. IEC logic symbol 001aah893 1D 1CP 1Q 2D 2CP 2Q 001aah894 D CP D CP |
유사한 부품 번호 - 74AUP2G80GT |
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유사한 설명 - 74AUP2G80GT |
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