전자부품 데이터시트 검색엔진 |
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74LVC2G07GM 데이터시트(PDF) 3 Page - NXP Semiconductors |
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74LVC2G07GM 데이터시트(HTML) 3 Page - NXP Semiconductors |
3 / 15 page 74LVC2G07_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 21 May 2007 3 of 15 NXP Semiconductors 74LVC2G07 Buffers with open-drain outputs 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. Fig 4. Pin configuration SOT363 and SOT457 Fig 5. Pin configuration SOT886 Fig 6. Pin configuration SOT891 74LVC2G07 1A 1Y GND 2A 2Y 001aab670 1 2 3 6 VCC 5 4 74LVC2G07 GND 001aab671 1A 2A VCC 1Y 2Y Transparent top view 2 3 1 5 4 6 74LVC2G07 GND 001aag423 1A 2A VCC 1Y 2Y Transparent top view 2 3 1 5 4 6 Table 3. Pin description Symbol Pin Description 1A 1 data input GND 2 ground (0 V) 2A 3 data input 2Y 4 data output VCC 5 supply voltage 1Y 6 data output Table 4. Function table[1] Input nA Output nY LL HZ |
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