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LM3S8630-IQN50-A2T 데이터시트(PDF) 73 Page - Texas Instruments |
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LM3S8630-IQN50-A2T 데이터시트(HTML) 73 Page - Texas Instruments |
73 / 546 page Table 6-1. System Control Register Map (continued) See page Description Reset Type Name Offset 95 Device Capabilities 2 0x000F.1013 RO DC2 0x014 97 Device Capabilities 3 0x8300.0000 RO DC3 0x018 98 Device Capabilities 4 0x5000.007F RO DC4 0x01C 76 Brown-Out Reset Control 0x0000.7FFD R/W PBORCTL 0x030 77 LDO Power Control 0x0000.0000 R/W LDOPCTL 0x034 118 Software Reset Control 0 0x00000000 R/W SRCR0 0x040 119 Software Reset Control 1 0x00000000 R/W SRCR1 0x044 121 Software Reset Control 2 0x00000000 R/W SRCR2 0x048 78 Raw Interrupt Status 0x0000.0000 RO RIS 0x050 79 Interrupt Mask Control 0x0000.0000 R/W IMC 0x054 80 Masked Interrupt Status and Clear 0x0000.0000 R/W1C MISC 0x058 81 Reset Cause - R/W RESC 0x05C 82 Run-Mode Clock Configuration 0x0780.3AD1 R/W RCC 0x060 86 XTAL to PLL Translation - RO PLLCFG 0x064 87 Run-Mode Clock Configuration 2 0x0780.2810 R/W RCC2 0x070 100 Run Mode Clock Gating Control Register 0 0x00000040 R/W RCGC0 0x100 106 Run Mode Clock Gating Control Register 1 0x00000000 R/W RCGC1 0x104 112 Run Mode Clock Gating Control Register 2 0x00000000 R/W RCGC2 0x108 102 Sleep Mode Clock Gating Control Register 0 0x00000040 R/W SCGC0 0x110 108 Sleep Mode Clock Gating Control Register 1 0x00000000 R/W SCGC1 0x114 114 Sleep Mode Clock Gating Control Register 2 0x00000000 R/W SCGC2 0x118 104 Deep Sleep Mode Clock Gating Control Register 0 0x00000040 R/W DCGC0 0x120 110 Deep Sleep Mode Clock Gating Control Register 1 0x00000000 R/W DCGC1 0x124 116 Deep Sleep Mode Clock Gating Control Register 2 0x00000000 R/W DCGC2 0x128 89 Deep Sleep Clock Configuration 0x0780.0000 R/W DSLPCLKCFG 0x144 6.4 Register Descriptions All addresses given are relative to the System Control base address of 0x400F.E000. 73 April 04, 2010 Texas Instruments-Production Data Stellaris® LM3S8630 Microcontroller |
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