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LM3S8630-IQN20-A2 데이터시트(PDF) 94 Page - Texas Instruments |
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LM3S8630-IQN20-A2 데이터시트(HTML) 94 Page - Texas Instruments |
94 / 546 page Description Reset Type Name Bit/Field Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation. 0 RO reserved 5 PLL Present When set, indicates that the on-chip Phase Locked Loop (PLL) is present. 1 RO PLL 4 Watchdog Timer Present When set, indicates that a watchdog timer is present. 1 RO WDT 3 SWO Trace Port Present When set, indicates that the Serial Wire Output (SWO) trace port is present. 1 RO SWO 2 SWD Present When set, indicates that the Serial Wire Debugger (SWD) is present. 1 RO SWD 1 JTAG Present When set, indicates that the JTAG debugger interface is present. 1 RO JTAG 0 April 04, 2010 94 Texas Instruments-Production Data System Control |
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