전자부품 데이터시트 검색엔진 |
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ADF5002BCPZ 데이터시트(PDF) 5 Page - Analog Devices |
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ADF5002BCPZ 데이터시트(HTML) 5 Page - Analog Devices |
5 / 12 page ADF5002 Rev. 0 | Page 5 of 12 NOTES 1. NC = NO CONNECT. 2. THE EXPOSED PADDLE MUST BE CONNECTED TO GND. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 INDICATOR 1 GND 2 RFIN 3 GND 4 GND 11 RFOUT 12 GND 10 RFOUT 9GND TOP VIEW (Not to Scale) ADF5002 Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No. Mnemonic Description 1, 3, 4, 5, 8, 9, 12, 13, 16 GND RF Ground. All ground pins should be tied together. 2 RFIN Single-Ended 50 Ω Input to the RF Prescaler. This pin is ac-coupled internally via a 3 pF capacitor. 6 NC No Connect. This pin can be left unconnected. 7 CE Chip Enable. This pin is active high. When CE is brought low, the part enters power-down mode. If this functionality is not required, the pin can be left unconnected because it is pulled up internally through a weak pull-up resistor. 10 RFOUT Divided-Down Output of the Prescaler. This pin has an internal 100 Ω load resistor tied to VDD2 and an ac-coupling capacitor of 1 pF. 11 RFOUT Complementary Divided-Down Output of the Prescaler. This pin has an internal 100 Ω load resistor tied to VDD2 and an ac-coupling capacitor of 1 pF. 14 VDD2 Voltage Supply for the Output Stage. This pin should be decoupled to ground with a 0.1 μF capacitor in parallel with a 10 pF capacitor and can be tied directly to VDD1. 15 VDD1 Voltage Supply for the Input Stage and Divider Block. This pin should be decoupled to ground with a 0.1 μF capacitor in parallel with a 10 pF capacitor. EPAD The LFCSP has an exposed paddle that must be connected to GND. |
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