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LM3S8630-EQN50-A2 데이터시트(PDF) 47 Page - Texas Instruments |
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LM3S8630-EQN50-A2 데이터시트(HTML) 47 Page - Texas Instruments |
47 / 546 page Table 3-1. Memory Map (continued) For details on registers, see page ... Description End Start - Reserved 0x4004.7FFF 0x4004.1000 440 Ethernet Controller 0x4004.8FFF 0x4004.8000 - Reserved 0x400F.BFFF 0x4004.9000 130 Hibernation Module 0x400F.CFFF 0x400F.C000 147 Flash control 0x400F.DFFF 0x400F.D000 73 System control 0x400F.EFFF 0x400F.E000 - Reserved 0x41FF.FFFF 0x400F.F000 - Bit-banded alias of 0x4000.0000 through 0x400F.FFFF 0x43FF.FFFF 0x4200.0000 - Reserved 0xDFFF.FFFF 0x4400.0000 Private Peripheral Bus ARM® Cortex™-M3 Technical Reference Manual Instrumentation Trace Macrocell (ITM) 0xE000.0FFF 0xE000.0000 ARM® Cortex™-M3 Technical Reference Manual Data Watchpoint and Trace (DWT) 0xE000.1FFF 0xE000.1000 ARM® Cortex™-M3 Technical Reference Manual Flash Patch and Breakpoint (FPB) 0xE000.2FFF 0xE000.2000 - Reserved 0xE000.DFFF 0xE000.3000 ARM® Cortex™-M3 Technical Reference Manual Nested Vectored Interrupt Controller (NVIC) 0xE000.EFFF 0xE000.E000 - Reserved 0xE003.FFFF 0xE000.F000 ARM® Cortex™-M3 Technical Reference Manual Trace Port Interface Unit (TPIU) 0xE004.0FFF 0xE004.0000 - Reserved 0xFFFF.FFFF 0xE004.1000 a. All reserved space returns a bus fault when read or written. b. The unavailable flash will bus fault throughout this range. c. The unavailable SRAM will bus fault throughout this range. 47 April 04, 2010 Texas Instruments-Production Data Stellaris® LM3S8630 Microcontroller |
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