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LM3S8630-EQR80-A2 데이터시트(PDF) 23 Page - Texas Instruments |
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LM3S8630-EQR80-A2 데이터시트(HTML) 23 Page - Texas Instruments |
23 / 546 page Table 2. Documentation Conventions (continued) Meaning Notation Two or more consecutive and related bits. bit field A hexadecimal increment to a register's address, relative to that module's base address as specified in “Memory Map” on page 46. offset 0xnnn Registers are numbered consecutively throughout the document to aid in referencing them. The register number has no meaning to software. Register N Register bits marked reserved are reserved for future use. In most cases, reserved bits are set to 0; however, user software should not rely on the value of a reserved bit. To provide software compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation. reserved The range of register bits inclusive from xx to yy. For example, 31:15 means bits 15 through 31 in that register. yy:xx This value in the register bit diagram indicates whether software running on the controller can change the value of the bit field. Register Bit/Field Types Software can read this field. The bit or field is cleared by hardware after reading the bit/field. RC Software can read this field. Always write the chip reset value. RO Software can read or write this field. R/W Software can read or write this field. A write of a 0 to a W1C bit does not affect the bit value in the register. A write of a 1 clears the value of the bit in the register; the remaining bits remain unchanged. This register type is primarily used for clearing interrupt status bits where the read operation provides the interrupt status and the write of the read value clears only the interrupts being reported at the time the register was read. R/W1C Software can read or write a 1 to this field. A write of a 0 to a R/W1S bit does not affect the bit value in the register. R/W1S Software can write this field. A write of a 0 to a W1C bit does not affect the bit value in the register. A write of a 1 clears the value of the bit in the register; the remaining bits remain unchanged. A read of the register returns no meaningful data. This register is typically used to clear the corresponding bit in an interrupt register. W1C Only a write by software is valid; a read of the register returns no meaningful data. WO This value in the register bit diagram shows the bit/field value after any reset, unless noted. Register Bit/Field Reset Value Bit cleared to 0 on chip reset. 0 Bit set to 1 on chip reset. 1 Nondeterministic. - Pin/Signal Notation Pin alternate function; a pin defaults to the signal without the brackets. [ ] Refers to the physical connection on the package. pin Refers to the electrical signal encoding of a pin. signal Change the value of the signal from the logically False state to the logically True state. For active High signals, the asserted signal value is 1 (High); for active Low signals, the asserted signal value is 0 (Low). The active polarity (High or Low) is defined by the signal name (see SIGNAL and SIGNAL below). assert a signal Change the value of the signal from the logically True state to the logically False state. deassert a signal Signal names are in uppercase and in the Courier font. An overbar on a signal name indicates that it is active Low. To assert SIGNAL is to drive it Low; to deassert SIGNAL is to drive it High. SIGNAL Signal names are in uppercase and in the Courier font. An active High signal has no overbar. To assert SIGNAL is to drive it High; to deassert SIGNAL is to drive it Low. SIGNAL Numbers 23 April 04, 2010 Texas Instruments-Production Data Stellaris® LM3S8630 Microcontroller |
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