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LM3S8630-IQR80-A2 데이터시트(PDF) 69 Page - Texas Instruments |
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LM3S8630-IQR80-A2 데이터시트(HTML) 69 Page - Texas Instruments |
69 / 546 page Figure 6-5. Main Clock Tree PLL (400 MHz) Main OSC Internal OSC (12 MHz) Internal OSC (30 kHz) ÷ 4 Hibernation Module (32.768 kHz) ÷ 25 PWRDN ADC Clock System Clock XTALa PWRDN b MOSCDIS a IOSCDIS a OSCSRCb,d BYPASS b,d SYSDIV b,d USESYSDIV a,d PWMDW a USEPWMDIV a PWM Clock a. Control provided by RCC register bit/field. b. Control provided by RCC register bit/field or RCC2 register bit/field, if overridden with RCC2 register bit USERCC2. c. Control provided by RCC2 register bit/field. d. Also may be controlled by DSLPCLKCFG when in deep sleep mode. ÷ 2 ÷ 50 CAN Clock Note: The figure above shows all features available on all Stellaris® Fury-class devices. 6.1.4.2 Crystal Configuration for the Main Oscillator (MOSC) The main oscillator supports the use of a select number of crystals. If the main oscillator is used by the PLL as a reference clock, the supported range of crystals is 3.579545 to 8.192 MHz, otherwise, the range of supported crystals is 1 to 8.192 MHz. The XTAL bit in the RCC register (see page 82) describes the available crystal choices and default programming values. Software configures the RCC register XTAL field with the crystal number. If the PLL is used in the design, the XTAL field value is internally translated to the PLL settings. 69 April 04, 2010 Texas Instruments-Production Data Stellaris® LM3S8630 Microcontroller |
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