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74AUC2G240DCTRE4 데이터시트(PDF) 1 Page - Texas Instruments |
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74AUC2G240DCTRE4 데이터시트(HTML) 1 Page - Texas Instruments |
1 / 13 page www.ti.com FEATURES Seemechanicaldrawingsfordimensions. DCTPACKAGE (TOP VIEW) DCUPACKAGE (TOP VIEW) 1 V CC 8 1OE 2 7 1A 2OE 3 6 2Y 1Y 4 5 GND 2A 3 6 1Y 2Y 8 1 V CC 1OE 5 GND 4 2A 2 7 2OE 1A YZP PACKAGE (BOTTOMVIEW) GND 5 4 2A 3 6 1Y 2Y 2 7 2OE 1A 8 V CC 1 1OE DESCRIPTION/ORDERING INFORMATION SN74AUC2G240 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCES534C – DECEMBER 2003 – REVISED JANUARY 2007 • Available in the Texas Instruments • Low Power Consumption, 10 µA at 1.8 V NanoFree™ Package • ±8-mA Output Drive at 1.8 V • Optimized for 1.8-V Operation and Is 3.6-V I/O • Latch-Up Performance Exceeds 100 mA Per Tolerant to Support Mixed-Mode Signal JESD 78, Class II Operation • ESD Protection Exceeds JESD 22 • I off Supports Partial-Power-Down Mode – 2000-V Human-Body Model (A114-A) Operation – 200-V Machine Model (A115-A) • Sub-1-V Operable – 1000-V Charged-Device Model (C101) • Max t pd of 1.8 ns at 1.8 V This dual buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC2G240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A input to the Y output. When OE is high, the outputs are in the high-impedance state. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2) NanoFree™ – WCSP (DSBGA) Reel of 3000 SN74AUC2G240YZPR _ _ _UK_ 0.23-mm Large Bump – YZP (Pb-free) –40°C to 85°C SSOP – DCT Reel of 3000 SN74AUC2G240DCTR U40_ _ _ VSSOP – DCU Reel of 3000 SN74AUC2G240DCUR UK_ (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. (2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site. DCU: The actual top-side marking has one additional character that designates the assembly/test site. YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2003–2007, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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