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TPD8S009DSMR 데이터시트(PDF) 5 Page - Texas Instruments |
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TPD8S009DSMR 데이터시트(HTML) 5 Page - Texas Instruments |
5 / 12 page APPLICATION INFORMATION Display Port Connector VERTICALLY OPPOSED CONNECTOR FRONT VIEW PIN NAME SIGNAL TYPE PIN NO. MATING ROW CONTACT LOCATION 16 8 12 18 4 14 20 6 10 2 15 7 11 17 3 13 19 8 9 1 GND GND Out In Out GND PWR RIN PWR Out Out Out GND I/O Out GND I/O Out GND GND Out Out GND GND ML Lane 3(n) Hot Plug Detect ML Lane 1(p) GND DP PWR Return DP PWR ML Lane 1(n) ML Lane 3(p) GND Aux CH (p) ML Lane 2(p) GND Aux CH (n) ML Lane 0(n) GND GND ML Lane 2(n) ML Lane 0(p) Bottom Bottom Bottom Bottom Bottom Bottom Bottom Bottom Bottom Bottom Top Top Top Top Top Top Top Top Top Top Core Scalar/ Switch TPD8S009 TPD4E001 TPD8S009 www.ti.com ....................................................................................................................................................................................................... SLVS816 – JULY 2008 TPD8S009 and TPD4E001 provide complete ESD protection for display or HDMI interface Figure 7. Typical Application The TPD8S009 can provide system-level ESD protection to the high-speed differential lines of the HDMI or display ports. The flow-through package offers flexibility for board routing with traces up to 15-mm wide. Figure 7 shows the board-layout scheme for the four differential pair lines. The special pin configuration of the TPD8S009 matches the HDMI or display port pin assignments. It allows the differential signal pairs to couple together after they touch the ESD ports (pins 1–3, 4–6, 7–9, and 10–12) of the TPD8S009. TPD4E001 is recommended for ESD protection of slow-speed control lines. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TPD8S009 |
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