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74ALVCH32501EC 데이터시트(PDF) 9 Page - NXP Semiconductors |
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74ALVCH32501EC 데이터시트(HTML) 9 Page - NXP Semiconductors |
9 / 15 page 2004 Oct 13 9 Philips Semiconductors Product specification 36-bit universal bus transceiver with direction pin; 3-state 74ALVCH32501 Notes 1. All typical values are measured at VCC = 2.5 V and Tamb =25 °C. 2. All typical values are measured at Tamb =25 °C. 3. All typical values are measured at VCC = 3.3 V and Tamb =25 °C. th hold time nAn after nCPAB↑ or nBn after nCPBA↑ see Figs 7 and 8 50 pF 1.6 0.3 − ns hold time CP HIGH or LOW nAn after nLEAB↓ or nBn after nLEBA↓ see Figs 7 and 8 50 pF 1.5 0.1 − ns fmax maximum clock frequency see Figs 5 and 8 50 pF 150 333 − MHz VCC = 3.0 V to 3.6 V; tr =tf ≤ 2.5 ns; note 3 tPHL/tPLH propagation delay nAn to nBn; nBn to nAn see Figs 4 and 8 50 pF 1.0 3.0 4.2 ns nLEBA to nAn; nLEAB to nBn see Figs 5 and 8 50 pF 1.3 3.4 4.8 ns nCPBA to nAn; nCPAB to nBn see Figs 5 and 8 50 pF 1.4 3.3 4.9 ns tPZH/tPZL 3-state output enable time nOEAB to nBn see Figs 6 and 8 50 pF 1.0 2.4 4.6 ns 3-state output enable time nOEBA to nAn see Figs 6 and 8 50 pF 1.1 2.5 5.0 ns tPHZ/tPLZ 3-state output disable time nOEAB to nBn see Figs 6 and 8 50 pF 1.4 2.9 5.0 ns 3-state output disable time nOEBA to nAn see Figs 6 and 8 50 pF 1.3 3.1 4.2 ns tW pulse width nLEAB or nLEBA HIGH see Figs 5 and 8 50 pF 3.3 0.9 − ns pulse width nCPAB or nCPBA HIGH or LOW see Figs 5 and 8 50 pF 3.3 1.1 − ns tsu set-up time nAn before nCPAB↑ or nBn before nCPBA↑ see Figs 7 and 8 50 pF +1.3 −0.3 − ns set-up time CP HIGH or LOW nAn before nLEAB↓ or nBn before nLEBA↓ see Figs 7 and 8 50 pF 1.0 0.3 − ns th hold time nAn after nCPAB↑ or nBn after nCPBA↑ see Figs 7 and 8 50 pF +1.3 −0.4 − ns hold time CP HIGH or LOW nAn after nLEAB↓ or nBn after nLEBA↓ see Figs 7 and 8 50 pF 1.2 0.1 − ns fmax maximum clock frequency see Figs 5 and 8 50 pF 150 340 − MHz SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNIT WAVEFORMS CL |
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