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SSTUG32865 데이터시트(PDF) 1 Page - NXP Semiconductors

부품명 SSTUG32865
상세설명  1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-1G RDIMM applications
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1.
General description
The SSTUG32865 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank
by four (2R
× 4) and similar high-density Double Data Rate 2 (DDR2) memory modules. It
is similar in function to the JEDEC-standard 14-bit DDR2 register, but integrates the
functionality of the normally required two registers in a single package, thereby freeing up
board real-estate and facilitating routing to accommodate high-density Dual In-line
Memory Module (DIMM) designs.
The SSTUG32865 also integrates a parity function, which accepts a parity bit from the
memory controller, compares it with the data received on the D-inputs and indicates
whether a parity error has occurred on its open-drain PTYERR pin (active LOW).
It further offers added features over the JEDEC standard register in that it can be
configured for normal or high output drive strength, simply by tying input pin SELDR either
HIGH of LOW as needed. This allows use in different module designs varying from low to
high density designs by picking the appropriate drive strength to match net loading
conditions. Furthermore, the SSTUG32865 features two additional chip select inputs,
which allow more versatile enabling and disabling in densely populated memory modules.
Both added features (drive strength and chip selects) are fully backward compatible to the
JEDEC standard register.
The SSTUG32865 is packaged in a 160-ball, 12
× 18 grid, 0.65 mm ball pitch, thin profile
fine-pitch ball grid array (TFBGA) package, which, while requiring a minimum
9mm
× 13 mm of board space, allows for adequate signal routing and escape using
conventional card technology.
2.
Features
I 28-bit data register supporting DDR2
I Fully compliant to JEDEC standard for SSTUB32865
I Supports 2 rank by 4 DIMM density by integrating equivalent functionality of two
JEDEC-standard DDR2 registers (that is, 2
× SSTUB32864 or 2 × SSTUB32866)
I Parity checking function across 22 input data bits
I Parity out signal
I Controlled multi-impedance output impedance drivers enable optimal signal integrity
and speed
I Exceeds SSTUB32865 JEDEC standard speed performance
I Supports up to 550 MHz clock frequency of operation
I Programmable for normal or high output drive
I Optimized pinout for high-density DDR2 module design
SSTUG32865
1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-1G
RDIMM applications
Rev. 01 — 16 August 2007
Product data sheet


유사한 부품 번호 - SSTUG32865

제조업체부품명데이터시트상세설명
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NXP Semiconductors
SSTUG32866 NXP-SSTUG32866 Datasheet
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   1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer
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SSTUG32868 NXP-SSTUG32868 Datasheet
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   1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications
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More results

유사한 설명 - SSTUG32865

제조업체부품명데이터시트상세설명
logo
NXP Semiconductors
SSTUG32868 NXP-SSTUG32868 Datasheet
174Kb / 29P
   1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications
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   1.8 V 28-bit 1:2 registered buffer with parity for DDR2 RDIMM
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SSTUA32S865 NXP-SSTUA32S865 Datasheet
160Kb / 29P
   1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications
Rev. 02-16 March 2007
SSTUB32865 NXP-SSTUB32865 Datasheet
163Kb / 28P
   1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-800 RDIMM applications
Rev. 03-27 March 2007
SSTUM32865 NXP-SSTUM32865 Datasheet
152Kb / 28P
   1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-800 RDIMM applications
Rev. 01-19 September 2007
SSTUM32868 NXP-SSTUM32868 Datasheet
177Kb / 30P
   1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications
Rev. 02-2 March 2007
SSTUB32868 NXP-SSTUB32868 Datasheet
264Kb / 30P
   1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications
Rev. 04-22 April 2010
SSTUH32865 PHILIPS-SSTUH32865 Datasheet
154Kb / 28P
   1.8 V 28-bit high output drive 1:2 registered buffer with parity for DDR2 RDIMM applications
Rev. 01-11 March 2005
SSTUM32866 NXP-SSTUM32866 Datasheet
158Kb / 28P
   1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications
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SSTU32866 PHILIPS-SSTU32866 Datasheet
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   1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications
Rev. 02-11 November 2004
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