AD5424/AD5433/AD5445

Rev. B | Page 7 of 32

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

2

3

4

5

6

7

16

10

11

12

13

14

15

AD5424

(Not to Scale)

GND

DB7

DB6

DB5

DB4

R/W

CS

DB0 (LSB)

DB1

R/W

CS

NC

NC

NC

GND

DB7

DB6

DB5

DB4

15

14

13

12

11

1

2

3

4

5

20 19 18 17 16

6 789 10

AD5424

TOP VIEW

PIN 1

INDICATOR

8

9

DB3

DB2

Figure 3. AD5424 Pin Configuration (TSSOP)

NC = NO CONNECT

Figure 4. AD5424 Pin Configuration (LFCSP)

Table 4. AD5424 Pin Function Descriptions

Pin No.

TSSOP

LFCSP

Mnemonic

Description

1

19

DAC Current Output.

2

20

DAC Analog Ground. This pin should normally be tied to the analog ground of the system.

3

1

GND

Ground.

4–11

2–9

DB7–DB0

Parallel Data Bits 7 to 0.

10–13

NC

No Internal Connection.

12

14

CS

Chip Select Input. Active low. Used in conjunction with R/W to load parallel data to the input latch or to

read data from the DAC register. Rising edge of CS loads data.

13

15

R/W

Read/Write. When low, use in conjunction with CS to load parallel data. When high, use with CS to read

back contents of DAC register.

14

16

Positive Power Supply Input. These parts can be operated from a supply of 2.5 V to 5.5 V.

15

17

DAC Reference Voltage Input Terminal.

16

18

DAC Feedback Resistor Pin. Establish voltage output for the DAC by connecting to external amplifier

output.