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KM416V254D 데이터시트(PDF) 8 Page - Samsung semiconductor

부품명 KM416V254D
상세설명  256K x 16Bit CMOS Dynamic RAM with Extended Data Out
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제조업체  SAMSUNG [Samsung semiconductor]
홈페이지  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KM416V254D 데이터시트(HTML) 8 Page - Samsung semiconductor

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KM416C254D, KM416V254D
CMOS DRAM
tASC, tCAH are referenced to the earlier CAS rising edge.
tCP is specified from the last CAS rising edge in the previous cycle to the first CAS falling edge in the next cycle.
tCWD is referenced to the later CAS falling edge at word red-modify-write cycle.
tCWL is specified from W falling edge to the earlier CAS rising edge.
tCSR is referenced to earlier CAS falling low before RAS transition low.
tCHR is referenced to the later CAS rising high after RAS transition low.
tCSR
tCHR
RAS
LCAS
UCAS
tDS
tDH
LCAS
DQ0 ~ DQ15
Din
20.
18.
17.
16.
13.
15.
14.
19.
UCAS
W
tDS, tDH are specified for the earlier CAS falling low.
f
tRASS
≥100us, then RAS precharge time must use tRPS instead of tRP.
For RAS-only refresh and burst CAS-before-RAS refresh mode, 512(512K) cycle of burst refresh must be executed within 8ms
before and after self refresh, in order to meet refresh specification.
For distributed CAS-before-RAS with 15.6us interval, CAS-before-RAS refresh should be executed with in 15.6us immediately
before and after self refresh in order to meet refresh specification.
21.
22.


유사한 부품 번호 - KM416V254D

제조업체부품명데이터시트상세설명
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Samsung semiconductor		 KM416V256D SAMSUNG-KM416V256D Datasheet
83Kb / 8P		    256K x 16Bit CMOS Dynamic RAM with Fast Page Mode
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유사한 설명 - KM416V254D

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