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KM6264BLG-7 데이터시트(PDF) 1 Page - Samsung semiconductor

부품명 KM6264BLG-7
상세설명  8Kx8 bit Low Power CMOS Static RAM
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제조업체  SAMSUNG [Samsung semiconductor]
홈페이지  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

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KM6264B Family
ELECTRONICS
CMOS SRAM
Revision. 0.0
Auust. 1996
1
Function
Address Inputs
Write Enable Input
Chip Select Input
Output Enable Input
Data Input/Output
Power(5V)
Ground
No Connection
FEATURE SUMMARY
GENERAL DESCRIPTION
The KM6264B family is fabricated by SAMSUNG's
advanced CMOS process technology. The family
can support various operating temperature ranges
and has various package types for user flexibility of
system design. The family also support low data
retention voltage for battery back-up operations with
low data retention current.
PRODUCT FAMILY
KM6264BL
KM6264BL-L
KM6264BLE
KM6264BLE-L
KM6264BLI
KM6264BLI-L
Commercial
(0~70 °C)
Extended
(-25~-85 °C)
Industrial
(-40~85 °C)
70/100/120ns
100*ns
100*ns
28-DIP, 28-SOP
28-SOP
28-SOP
Power Dissipation
Standby(Isb1, Max)
100uA
10uA
100uA
50uA
100uA
50uA
Operating(Icc2)
PKG Type
Speed
Operating
Temperature
Product
Family
• Process Technology : CMOS
• Organization : 8K x 8
• Power Supply Voltage : Single 5V ± 10%
• Low Data Retention Voltage : 2V(Min)
• Three state output and TTL Compatible
• Package Type : JEDEC Standard
28-DIP, 28-SOP
8Kx8 bit Low Power CMOS Static RAM
PIN DESCRIPTION
Vcc
/WE
CS2
A8
A9
A11
/OE
A10
/CS1
I/O8
I/O7
I/O6
I/O5
I/O4
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
N.C
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
28-Pin DIP
28-Pin SOP
FUNCTIONAL BLOCK DIAGRAM
Pin Name
A0~A12
/WE
/CS1, CS2
/OE
I/O1~I/O8
Vcc
Vss
N.C
55mA
I/O1~8
Y-Decoder
I/O Buffer
Cell Array
A0~A12
/CS1, CS2
/WE, /OE
* measured with 30pF test load


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