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ISL28196FRUZ-T7 데이터시트(PDF) 11 Page - Intersil Corporation |
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ISL28196FRUZ-T7 데이터시트(HTML) 11 Page - Intersil Corporation |
11 / 14 page 11 FN6152.3 November 5, 2007 Break-Before-Make Operation of the Output The output circuit has a break-before-make response. This means that the P-Channel turns off before the N-Channel turns on during a high to low transition of the output (reference Figure 43). Likewise, the N-Channel turns off before the P-Channel turns on during a low to high transition. This results in different propagation delay times depending upon where the output load resistor is tied to. If the load resistor is tied to ground, (Figure 44A) then the propagation delay is controlled by the P-Channel. For a high to low transition the propagation delay does not include the additional break-before-make time because the load resistor will pull the output low once the P-Channel has turned off. During the low to high transition, however, if the load resistor is tied to ground, then the additional break-before-make time is added to the propagation delay time because the output won’t pull high until the P-Channel turns on. If the load resistor is tied to V+ (Figure 44B) then the propagation delay is controlled by the N-Channel. For this condition, the additional delay time is added to the high to low transition because the output won’t pull low until the N-Channel turns on. Figures 3 through 10 show the differences in propagation delay depending upon where the load is tied. Propagation Delay The input to output propagation delay has a dependency on power supply voltage, overdrive and whether the output is sourcing or sinking current. Figures 3 and 5 show a decreasing time propagation delay vs supply voltage for the ISL28196 and Figure 4 shows a similar behavior for the ISL28197. The output break-before-make mechanism results in a difference in propagation delay, depending on whether the output stage NMOS and PMOS are sourcing or sinking current. This delay difference is shown in the figures as a function of where the load is terminated (+V or -V) and also as a function of supply voltage. The dependence of propagation delay as a function of power supply voltage and input overdrive (from 5mV to 1V) is shown in Figures 7 and 9 for the ISL28196, and Figures 8 and 10 for the ISL28197. Enable Feature Both parts offer an EN pin, which enables the device when pulled high. The enable threshold is referenced to the -V terminal and has a level proportional to the total supply voltage (reference Figures 13 and 14 for EN Threshold vs Supply Voltage). The enable circuit has a delay time that changes as a function of supply voltage. Figures 23 through 26 show the effect of supply voltage on the enable and disable times. For supply voltages less than 3V, it is recommended that the user account for the increase enable/disable delay time. In the disabled state (output in a high impedance state), the supply current is reduced to a typical of only 2nA. By disabling the devices, multiple parts can be connected together as a MUX. In this configuration, the outputs are tied together in parallel and a channel can be selected by the EN pin. The EN pin should never be left floating. The EN pin should be connnected directly to the V+ supply when not in use. Proper Layout Maximizes Performance To achieve the maximum performance of the high input impedance, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasitic resistance on the board. When input leakage current is a concern, the use of guard rings around the comparator inputs will further reduce leakage currents. FIGURE 44A. RL TO GND FIGURE 44B. RL TO V+ FIGURE 44. CONNECTION OF RL TO GND AND V+ VOUT v+ P-CHANNEL N-CHANNEL FIGURE 43. MAKE-BEFORE-BREAK ACTION OF THE OUTPUT STAGE ISL28196 AND ISL28197 OUTPUT STAGE BREAK-BEFORE-MAKE + - VOUT V+ RL + - VOUT V+ RL ISL28196, ISL28197 |
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