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FAN5365 데이터시트(PDF) 6 Page - Fairchild Semiconductor |
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FAN5365 데이터시트(HTML) 6 Page - Fairchild Semiconductor |
6 / 24 page © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN5365 • Rev. 1.0.4 6 Electrical Specifications (Continued) Unless otherwise noted, over the recommended operating range for VIN and TA, EN = VSEL = SCL = SDA = 1.8V, and register VSEL0[6] bit = 1. Typical values are at VIN = 3.6V, TA = 25°C. Circuit and components according to Figure 1. Symbol Parameter Conditions Min. Typ. Max. Units DAC Resolution 6 Bits Differential Nonlinearity Monotonicity Assured by Design 0.8 LSB Timing I 2CEN EN HIGH to I 2C Start 250 μs tV(L-H) VOUT LOW to HIGH Settling Transition from 0.75V to 1.438V VOUT Settled to within 2% of Setpoint 7 μs Soft-Start tSS Regulator Enable to Regulated VOUT RLOAD > 5Ω, to VOUT = Power-up Default 140 180 μs Notes: 11. Limited by the effect of tOFF minimum (see Figure 14 in Typical Performance Characteristics). Block Diagram REF DAC SOFT START FPWM EN_REG CLK 6 Mhz Osc I2C INTERFACE AND LOGIC EN VSEL SDA SCL SW Q1 Q2 PGND VIN COUT VOUT L VOUT CIN AGND MODULATOR VIN Figure 3 Block Diagram |
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