전자부품 데이터시트 검색엔진 |
|
FAN6300H 데이터시트(PDF) 4 Page - Fairchild Semiconductor |
|
FAN6300H 데이터시트(HTML) 4 Page - Fairchild Semiconductor |
4 / 15 page © 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6300A / FAN6300H • Rev. 1.0.1 4 Pin Configuration Figure 4. Pin Configuration Pin Definitions Pin # Name Description 1 DET This pin is connected to an auxiliary winding of the transformer via resistors of the divider for the following purposes: - Generates a ZCD signal once the secondary-side switching current falls to zero. - Produces an offset voltage to compensate the threshold voltage of the peak current limit to provide a constant power limit. The offset is generated in accordance with the input voltage when PWM signal is enabled. - Detects the valley voltage of the switching waveform to achieve the valley voltage switching and minimize the switching losses. A voltage comparator and a 2.5V reference voltage develop a output OVP protection. The ratio of the divider decides what output voltage to stop gate, as an optical coupler and secondary shunt regulator are used. 2 FB The feedback pin should to be connected to the output of the error amplifier for achieving the voltage control loop. The FB should be connected to the output of the optical coupler if the error-amplifier is equipped at the secondary-side of the power converter. For the primary-side control application, FB is applied to connect a RC network to the ground for feedback-loop compensation. The input impedance of this pin is a 5k Ω equivalent resistance. A 1/3 attenuator connected between the FB and the PWM circuit is used for the loop-gain attenuation. FAN6300A/H performs an open-loop protection once the FB voltage is higher than a threshold voltage (around 4.2V) more than 55ms. 3 CS Input to the comparator of the over-current protection. A resistor senses the switching current and the resulting voltage is applied to this pin for the cycle-by-cycle current limit. 4 GND The power ground and signal ground. A 0.1µF decoupling capacitor placed between VDD and GND is recommended. 5 GATE Totem-pole output generates the PWM signal to drive the external power MOSFET. The clamped gate output voltage is 18V. 6 VDD Power supply. The threshold voltages for startup and turn-off are 16V and 10V, respectively. The startup current is less than 20µA and the operating current is lower than 4.5mA. 7 NC No connect 8 HV High-voltage startup. |
유사한 부품 번호 - FAN6300H |
|
유사한 설명 - FAN6300H |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |