전자부품 데이터시트 검색엔진 |
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FAN7530 데이터시트(PDF) 7 Page - Fairchild Semiconductor |
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FAN7530 데이터시트(HTML) 7 Page - Fairchild Semiconductor |
7 / 37 page © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN9611 / FAN9612 • Rev. 1.1.3 7 Electrical Characteristics (Continued) Unless otherwise noted, VDD = 12V, TJ = -40°C to +125°C. Currents are defined as positive into the device and negative out of the device. Symbol Parameter Conditions Min. Typ. Max. Unit Current Sense VCS CS Input Threshold Voltage Limit 0.19 0.21 0.23 V ICS CS Input Current VCSX = 0V to 1V –0.2 0.2 µA tCS_DELAY CS to Output Delay CS Stepped from 0V to 5V 85 100 ns Zero Current Detection VZCD_IN Input Voltage Threshold (4) –0.1 0 0.1 V VZCD_H Input High Clamp Voltage IZCD = 0.5mA 0.8 1.0 1.2 V VZCD_L Input Low Clamp Voltage IZCD = –0.5mA –0.7 –0.5 –0.3 V IZCD_SRC Source Current Capability (4) 1 mA IZCD_SNK Sink Current Capability (4) 10 mA tZCD_DLY Turn-On Delay (5) ZCDx to OUTx 180 ns Output ISINK OUTx Sink Current (5) VOUTx = VDD/2; CLOAD = 0.1µF 2.0 A ISOURCE OUTx Source Current (5) VOUTx = VDD/2; CLOAD = 0.1µF 1.0 A tRISE Rise Time CLOAD = 1nF, 10% to 90% 10 25 ns tFALL Fall Time CLOAD = 1nF, 90% to 10% 5 20 ns VO_UVLO Output Voltage During UVLO VDD = 5V; IOUT = 100µA 1 V IRVS Reverse Current Withstand (5) 500 mA Soft-Start (CSS = 0.1µF) ISS_MAX Maximum Soft-Start Current VCOMP < 3.0V –7 –5 –3 µA ISS_MIN Minimum Soft-Start Current(5) VCOMP > 4.5V –0.40 –0.25 –0.10 µA Input Brown-Out Protection VIN_BO Input Brownout Threshold 0.76 0.925 1.10 V IVINSNK VIN Sink Current VVIN > 1.1V –0.2 0.2 µA VVIN < 0.8V 1.4 2 2.5 µA Input-Voltage Feedforward Range VFF_UL VIN Feedforward Upper Limit (5) 3.1 3.7 4.3 V VFF_RATIO VFF_UL / VIN_BO (5) 3.6 4.0 4.3 Phase Management VPH,DROP Phase Dropping Threshold VCOMP Decreasing, Transition from 2 to 1 Phase, TA = 25°C 0.66 0.73 0.80 V VPH,ADD Phase Adding Threshold VCOMP Increasing, Transition from 1 to 2 Phase, TA = 25°C 0.86 0.93 1.00 V Over-Voltage Protection Using FB Pin – Cycle-by-Cycle (Input) VOVPNL Non-Latching OVP Threshold (+8% above VOUT_NOMINAL) TA = 25°C DRV1=DRV2=0V 3.15 3.25 3.35 V VOVPNL_HYS OVP Hysteresis FB Decreasing 0.24 V Over-Voltage Protection Using OVP Pin – Latching (Input) VOVPLCH Latching OVP Threshold (+15%) DRV1=DRV2=0V 3.36 3.50 3.65 V Note: 5. Not tested in production. |
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