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FAN7530 데이터시트(PDF) 12 Page - Fairchild Semiconductor |
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FAN7530 데이터시트(HTML) 12 Page - Fairchild Semiconductor |
12 / 37 page © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN9611 / FAN9612 • Rev. 1.1.3 12 This method is especially dangerous in power-factor- corrector applications because the error amplifier’s bandwidth is typically limited to a very low crossover frequency. The slow response of the amplifier can cause considerable overshoot at the output. FAN9611/12 employs closed-loop soft-start where the reference voltage of the error amplifier is slowly increased to its final value. When the current and power limits of the converter are properly taken into consideration, the output voltage of the converter follows the reference voltage. This ensures that the error amplifier stays in regulation during soft start and the output voltage overshoot can be eliminated. Functional Description 1. Detecting Zero Inductor Current (ZCD1, ZCD2) Each ZCD pin is internally clamped close to 0V (GND). Any capacitance on the pin is ineffective in providing any delay in ZCD triggering. The internal sense circuit is a true differentiator to catch the valley of the drain waveforms. The resistor between the auxiliary winding of the boost inductor and the ZCD pin is only used for current limiting. The maximum source current during zero current detection must be limited to 0.5mA. Source and sink capability of the pin is about 1mA, providing sufficient margin for the higher source current required during the on-time of the power MOSFETs. Figure 16. Zero-Current Detect Circuit The RZCD resistor value can be approximated by: BOOST AUX O ZCD N N V mA . R 2 5 0 1 (1) 2. 5V Bias Rail (5VB) This is the bypass capacitor pin for the internal 5V bias rail powering the control circuitry. The recommended capacitor value is 220nF. At least a 100nF, good-quality, high-frequency, ceramic capacitor should be placed in close proximity to the pin. The 5V rail is a switched rail. It is actively held LOW when the FAN9611/12 is in under-voltage lockout. Once the UVLO turn-on threshold is exceeded at the VDD pin, the 5V rail is turned on, providing a sharp edge that can be used as an indication that the chip is running. Potentially, this behavior can be utilized to control the inrush current limiting circuit. Figure 17. 5V Bias 3. Maximum On-Time Control (MOT) Maximum on-time, MOT, (of the boost MOSFET) is set by a resistor to analog ground (AGND). The FAN9611/12 implements input-voltage feedforward. The maximum on-time is a function of the RMS input voltage. The voltage on the MOT pin is 1.25V during operation (constant DC voltage). The maximum on-time of the power MOSFETs can be approximated by: 12 , 2 , 2.4 1 120 10 1.25 ON MAX MOT INSNS PK tR V (2) where VINSNS,PK is the peak of the AC input voltage as measured at the VIN pin (must be divided down, see the VIN pin description ). Figure 18. Maximum On-Time Control (MOT) |
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