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74LVC1G125GV 데이터시트(PDF) 3 Page - NXP Semiconductors |
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3 / 19 page 74LVC1G125 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 9 — 29 December 2010 3 of 19 NXP Semiconductors 74LVC1G125 Bus buffer/line driver; 3-state 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Fig 4. Pin configuration SOT353-1 and SOT753 Fig 5. Pin configuration SOT886 Fig 6. Pin configuration SOT891, SOT1115 and SOT1202 74LVC1G125 OE VCC A GND Y 001aaf198 1 2 3 5 4 74LVC1G125 A 001aaf199 OE GND n.c. VCC Y Transparent top view 2 3 1 5 4 6 74LVC1G125 A 001aaf400 OE GND n.c. VCC Y Transparent top view 2 3 1 5 4 6 Table 3. Pin description Symbol Pin Description SOT353-1, SOT753 SOT886, SOT891, SOT1115, SOT1202 OE 1 1 output enable input A 2 2 data input GND 3 3 ground (0 V) Y 4 4 data output n.c. - 5 not connected VCC 5 6 supply voltage Table 4. Function table[1] Input Output OE A Y LLL LH H HX Z |
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