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74LVC1G125 데이터시트(PDF) 7 Page - NXP Semiconductors |
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74LVC1G125 데이터시트(HTML) 7 Page - NXP Semiconductors |
7 / 19 page 74LVC1G125 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 9 — 29 December 2010 7 of 19 NXP Semiconductors 74LVC1G125 Bus buffer/line driver; 3-state 11. Dynamic characteristics [1] Typical values are measured at Tamb =25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. [2] tpd is the same as tPLH and tPHL [3] ten is the same as tPZH and tPZL [4] tdis is the same as tPLZ and tPHZ [5] CPD is used to determine the dynamic power dissipation (PD in W). PD =CPD VCC2 fi N+ (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (C L VCC 2 f o) = sum of outputs. Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9. Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max tpd propagation delay A to Y; see Figure 7 [2] VCC = 1.65 V to 1.95 V 1.0 3.3 8.0 1.0 10.5 ns VCC = 2.3 V to 2.7 V 0.5 2.2 5.5 0.5 7 ns VCC = 2.7 V 0.5 2.5 5.5 0.5 7 ns VCC = 3.0 V to 3.6 V 0.5 2.1 4.5 0.5 6 ns VCC = 4.5 V to 5.5 V 0.5 1.7 4.0 0.5 5.5 ns ten enable time OE to Y; see Figure 8 [3] VCC = 1.65 V to 1.95 V 1.0 4.1 9.4 1.0 12 ns VCC = 2.3 V to 2.7 V 0.5 2.8 6.6 0.5 8.5 ns VCC = 2.7 V 0.5 3.3 6.6 0.5 8.5 ns VCC = 3.0 V to 3.6 V 0.5 2.4 5.3 0.5 7 ns VCC = 4.5 V to 5.5 V 0.5 2.1 5.0 0.5 6.5 ns tdis disable time OE to Y; see Figure 8 [4] VCC = 1.65 V to 1.95 V 1.0 4.3 9.2 1.0 12 ns VCC = 2.3 V to 2.7 V 0.5 2.7 5.0 0.5 6.5 ns VCC = 2.7 V 0.5 3.0 5.0 0.5 6.5 ns VCC = 3.0 V to 3.6 V 0.5 3.1 5.0 0.5 6.5 ns VCC = 4.5 V to 5.5 V 0.5 2.2 4.2 0.5 5.5 ns CPD power dissipation capacitance per buffer; VI = GND to VCC [5] output enabled - 25 - - - pF output disabled - 6 - - - pF |
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