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AM3358 데이터시트(PDF) 1 Page - Texas Instruments |
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AM3358 데이터시트(HTML) 1 Page - Texas Instruments |
1 / 162 page AM3359, AM3358, AM3357 AM3356, AM3354, AM3352 www.ti.com SPRS717 – OCTOBER 2011 AM335x ARM® Cortex ™-A8 Microprocessors (MPUs) Check for Samples: AM3359, AM3358 1 Device Summary 1.1 Features 1234567 – 256KB of L2 Cache with Error Correcting • Highlights Code (ECC) – 500-MHz, 600-MHz, or 720-MHz ARM® – 176KB of On-Chip Boot ROM Cortex ™-A8 32-Bit RISC Microprocessor – 64KB of Dedicated RAM • NEON ™ SIMD Coprocessor – Emulation/Debug • 32KB/32KB of L1 Instruction/Data Cache with Single-Error Detection (parity) • JTAG • 256KB of L2 Cache with Error Correcting • Embedded Trace Module Code (ECC) • Embedded Trace Buffer – mDDR(LPDDR)/DDR2/DDR3 Support – Interrupt Controller (up to 128 interrupt – General-Purpose Memory Support (NAND, requests) NOR, SRAM, etc.) Supporting Up to 16-bit • On-Chip Memory (Shared L3 RAM) ECC – 64 KB of General-Purpose On-Chip Memory – SGX530 Graphics Engine Controller (OCMC) RAM – Programmable Real-Time Unit Subsystem – Accessible to all Masters – Real-Time Clock (RTC) – Supports Retention for Fast Wake-Up – Up to Two USB 2.0 High-Speed OTG Ports • External Memory Interfaces (EMIF) with Integrated PHY – mDDR/DDR2/DDR3 Controller: – 10/100/1000 Ethernet Switch Supporting Up • mDDR: 200-MHz Clock (400-MHz Data to Two Ports Rate) – Two Controller Area Network Ports (CAN) • DDR2: 266-MHz Clock (532-MHz Data – Six UARTs, Two McASPs, Two McSPI, and Rate) Two I2C Ports • DDR3: 303-MHz Clock (606-MHz Data – 12-Bit Successive Approximation Register Rate) (SAR) ADC • 16-Bit Data Bus – Up to Three 32-Bit Enhanced Capture • 1 GB of Total Addressable Space Modules (eCAP) • Supports One x16, Two x8, or Four x4 – Up to Three Enhanced High-Resolution PWM Memory Device Configurations Modules (eHRPWM) • Supports Retention for Fast Wake-Up – Crypto Hardware Accelerators (AES, SHA, – General-Purpose Memory Controller (GPMC) PKA, RNG) • Flexible 8/16-Bit Asynchronous Memory Interface with Up to seven Chip Selects • MPU Subsystem (NAND, NOR, Muxed-NOR, SRAM, etc.) – 500-MHz, 600-MHz, or 720-MHz ARM® • Uses BCH Code to Support 4-Bit, 8-Bit, or Cortex ™-A8 32-Bit RISC Microprocessor 16-Bit ECC – NEON™ SIMD Coprocessor • Uses Hamming Code to Support 1-Bit – 32KB of L1 Instruction Cache with ECC Single-Error Detection (parity) – Error Locator Module (ELM) – 32KB of L1 Data Cache with Single • Used in Conjunction with the GPMC to Error-Detection (parity) Locate Addresses of Data Errors from 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 SmartReflex, DSP/BIOS, XDS are trademarks of Texas Instruments. 3 Cortex, NEON are trademarks of ARM Ltd or its subsidiaries. 4 ARM is a registered trademark of ARM Ltd or its subsidiaries. 5 EtherCAT is a registered trademark of EtherCAT Technology Group. 6 POWERVR is a registered trademark of Imagination Technologies Limited. 7 All other trademarks are the property of their respective owners. PRODUCT PREVIEW information concerns products in the formative or design phase of Copyright © 2011, Texas Instruments Incorporated development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. English Data Sheet: SPRS717 ProdPrev |
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